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AuthorCommitMessageCommit Date
Anson HuangAnson Huang
a25a38bcc08MLK-17083 soc: imx: limit VPU/CPU bandwidth for lcdif on i.MX8MQ Config NOC to limit bandwidth to 4GB for both VPU and CPU to avoid lcdif flickering only when lcdif is enabled. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Bai Ping <ping.bai@nxp.com> (cherry picked from commit 8ab89ebeb94a423792bf588bdf2354c5960d8f13)
Robin GongRobin Gong
717ab9037ddMLK-17094 dma: fsl-edma-v3: add suspend/resume to restore back channel registers Add suspend to save channel registers and resume to restore them back since edmav3 may powered off in suspend. Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Han XuHan Xu
6d294afee5fMLK-17120: arm64: dts: assign the clock rate for GPMI NAND in DT Assign the clock rate for GPMI NAND on i.MX8QXP ARM2 device tree. To keep the same clock rate after system suspend/resume, we need to set assign a clock rate for GPMI NAND, otherwise the timing register won't match with the clock setting. The code change also a workaround for SCU clock rate setting. NAND use a very low clock freq (22Mhz) and safe timing to identify which chips were connected. This low freq divide from high fr...
Frank LiFrank Li
fb3df885377MLK-17081 arm64: imx8mq: export chip unique id cat /sys/devices/soc0/soc_uid 1b1331d6f0609502 Signed-off-by: Frank Li <Frank.Li@nxp.com>
Li JunLi Jun
ebc9b527a84MLK-17092 staging: typec: enable vbus voltage low alarm We use vbus low voltage alarm to start vbus discharge to meet timing requirement on turning off vbus for power swap from source to sink, per type-C port controller spec(tcpci), the Voltage Alarms Power status reporting is disabled by default, so we need enable it at tcpci init. Acked-by: Peter Chen <peter.chen@nxp.com> Signed-off-by: Li Jun <jun.li@nxp.com>
Li JunLi Jun
415ccba5783MLK-17077 staging: typec: clear vbus change event in irq handler For vbus change event, we need read the vbus status to clear the alert. Current code do this in queue work, this has problem on single core running, the queue work of vbus change may have no chance to be scheduled as we continue receive the vbus change event in threaded irq. Acked-by: Peter Chen <peter.chen@nxp.com> Signed-off-by: Li Jun <jun.li@nxp.com>
Robert ChirasRobert Chiras
4b0fcb64115MLK-16986-5: arm64: dts: fsl-imx8mq.dtsi: Define max-res of lcdif node to 720p Limit the maximum resolution supported by LCDIF to 1280x720, for better performance when used with DCSS in dual-display mode. Signed-off-by: Robert Chiras <robert.chiras@nxp.com> Reviewed-by: Laurentiu Palcu <laurentiu.palcu@nxp.com
Robert ChirasRobert Chiras
1a0d2461849MLK-16986-4: drm/mxsfb: Add max-res property for MXSFB For stability issues, we want to limit the maximum resolution supported by the MXSFB (eLCDIF) driver. This patch adds a new property which we can use to impose such limitation. Signed-off-by: Robert Chiras <robert.chiras@nxp.com> Reviewed-by: Laurentiu Palcu <laurentiu.palcu@nxp.com
Robert ChirasRobert Chiras
b903540cf52MLK-16986-3: drm/imx: Add a delay to enable function in nwl_dsi-imx To allow the PLL to become stable before enabling the clocks, we may need a delay. This patch adds a new property to specify this delay from DTS file. Reviewed-by: Laurentiu Palcu <laurentiu.palcu@nxp.com Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Robert ChirasRobert Chiras
e8154d95783MLK-16986-2: drm/imx: Fix nwl_dsi-imx driver Since the ADV7535 can change the DSI lanes used in mode_set, we need to set up the Mixel PHY speed again, in enable() function, so that we will take into account the new DSI lanes. Signed-off-by: Robert Chiras <robert.chiras@nxp.com> Reviewed-by: Laurentiu Palcu <laurentiu.palcu@nxp.com
Robert ChirasRobert Chiras
185128c03d1MLK-16986-1: phy: Fix Mixel PHY driver best_match When setting up the CM, CN and CO decimal values for DPHY PLL, these values should only be rounded up when a "best_match" is requested. Some DSI receivers requires the DSI clock to be exactly matched with the pixel clock. Signed-off-by: Robert Chiras <robert.chiras@nxp.com> Reviewed-by: Laurentiu Palcu <laurentiu.palcu@nxp.com
Eric AnholtEric Anholt
f122a356c4adrm/vc4: Add T-format scanout support. The T tiling format is what V3D uses for textures, with no raster support at all until later revisions of the hardware (and always at a large 3D performance penalty). If we can't scan out V3D's format, then we often need to do a relayout at some stage of the pipeline, either right before texturing from the scanout buffer (common in X11 without a compositor) or between a tiled screen buffer right before scanout (an option I've considered in trying to re...
Alexandre CourbotAlexandre Courbot
b562a19ccf4drm/tegra: Add tiling FB modifiers Add FB modifiers to allow user-space to specify that a surface is in one of the two tiling formats supported by Tegra chips, and add support in the tegradrm driver to handle them properly. This is necessary for the display controller to directly display buffers generated by the GPU. This feature is intended to replace the dedicated IOCTL enabled by TEGRA_STAGING and to provide a non-staging alternative to that solution. Signed-off-by: Alexandre Courbot <a...
Philipp ZabelPhilipp Zabel
5c60e4a8fd7drm/fourcc: add vivante tiled layout format modifiers Vivante GC hardware uses simple 4x4 tiled and nested 64x64 supertiled formats as well as so-called split-tiled variants for dual-pipe hardware, where even and odd tiles start at different base addresses. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-By: Wladimir J. van der Laan <laanwj@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/20170126153217.26916-...
Rafael J. WysockiRafael J. Wysocki
3c48cdbdb3bdriver core: Functional dependencies tracking support Currently, there is a problem with taking functional dependencies between devices into account. What I mean by a "functional dependency" is when the driver of device B needs device A to be functional and (generally) its driver to be present in order to work properly. This has certain consequences for power management (suspend/resume and runtime PM ordering) and shutdown ordering of these devices. In general, it also implies that the dr...
Rafael J. WysockiRafael J. Wysocki
3b74b360ce3driver core: Add a wrapper around __device_release_driver() Add an internal wrapper around __device_release_driver() that will acquire device locks and do the necessary checks before calling it. The next patch will make use of it. Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> (cherry picked from commit 4bdb35506b89cbbd150c1baa284e7c191698241f)
Shengjiu WangShengjiu Wang
5b7aa30357bMLK-17089-7: ASoC: fsl_mqs: support suspend & resume for imx8 Base on latest power management design in MLK-17074, every driver need to enter runtime suspend state in suspend, so the driver should call the pm_runtime_force_suspend in suspend. with this implementation the suspend function almost same as runtime suspend function. so remove the suspend function, just use pm_runtime_force_suspend instead. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Shengjiu WangShengjiu Wang
e98f31e8259MLK-17089-6: ASoC: wm8962: support suspend & resume for imx8 Base on latest power management design in MLK-17074, every driver need to enter runtime suspend state in suspend, so the driver should call the pm_runtime_force_suspend in suspend. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Shengjiu WangShengjiu Wang
29823d93bbdMLK-17089-5: ASoC: wm8962: restore the CLOCKING2 register The CLOCKING2 is a volatile register, but some bits should be restored when resume, for example SYSCLK_SRC. otherwise the output clock is wrong Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Shengjiu WangShengjiu Wang
82513b22b7cMLK-17089-4: ASoC: fsl_spdif: support suspend & resume for imx8 Base on latest power management design in MLK-17074, every driver need to enter runtime suspend state in suspend, so the driver should call the pm_runtime_force_suspend in suspend. with this implementation the suspend function almost same as runtime suspend function. so remove the suspend function, just use pm_runtime_force_suspend instead. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Shengjiu WangShengjiu Wang
a9e2c6fe6aeMLK-17089-3: ASoC: wm8960: support suspend & resume for imx8 Base on latest power management design in MLK-17074, every driver need to enter runtime suspend state in suspend, so the driver should call the pm_runtime_force_suspend in suspend. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Shengjiu WangShengjiu Wang
750d3fbf594MLK-17089-2: ASoC: fsl_esai: support suspend & resume for imx8 Base on latest power management design in MLK-17074, every driver need to enter runtime suspend state in suspend, so the driver should call the pm_runtime_force_suspend in suspend. with this implementation the suspend function almost same as runtime suspend function. so remove the suspend function, just use pm_runtime_force_suspend instead. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Shengjiu WangShengjiu Wang
f83eb38634dMLK-17089-1: ASoC: fsl_sai: support suspend & resume for imx8 Base on latest power management design in MLK-17074, every driver need to enter runtime suspend state in suspend, so the driver should call the pm_runtime_force_suspend in suspend. with this implementation the suspend function almost same as runtime suspend function. so remove the suspend function, just use pm_runtime_force_suspend instead. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Guoniu.ZhouGuoniu.Zhou
7d8a6960fc9MLK-16823-1: mipi_csi: Add runtime suspend/resume Add runtime suspend/resume features support for mipi csi. For saving power, the mipi_csi turn off it's power domain and clock after probe. In order to share code with system pm suspend/resume, I change system suspend/resume in this patch. Reviewed-by: Sandor Yu <sandor.yu@nxp.com> Signed-off-by: Guoniu.Zhou <guoniu.zhou@nxp.com> (cherry picked from commit f88f4ac99b23e03b1cc1d87209875d6001dbbbe5)
Guoniu.ZhouGuoniu.Zhou
cf4cc632f52MLK-16823-2: mipi_csi: Add runtime suspend/resume Add runtime suspend/resume support for ISI. For saving power, the ISI turn off it's power domain after probe. Reviewed-by: Sandor Yu <sandor.yu@nxp.com> Signed-off-by: Guoniu.Zhou <guoniu.zhou@nxp.com> (cherry picked from commit d0cf6f32660c5b03fda5083fee578579f22c4d3b)
Liu YingLiu Ying
a3346af5c59MLK-17059 drm/imx: dpu: crtc: Disable plane src stream ids if necessary in atomic flush We've got chance to commit update for one display stream only instead of always binding two display streams together for commit since the below commit. Thus, we should disable plane source stream ids where necessary only for one CRTC in ->atomic_flush(). Fixes: 7798441bb25e ("MLK-16771 drm/imx: dpu: kms: Change to use a better KMS") Signed-off-by: Liu Ying <victor.liu@nxp.com>
Robert ChirasRobert Chiras
73e9847275bMLK-16926-4: arm64: dts: fsl-imx8mq-evk: Add sync polarity for LCDIF use-cases For some reasons, the sync polarity of the eLCDIF when used with NWL DSI controller needs to be HIGH, so set it in the DTS nodes. Signed-off-by: Robert Chiras <robert.chiras@nxp.com> Reviewed-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Robert ChirasRobert Chiras
8facfc1351aMLK-16926-3: drm/imx: Add sync-pol to nwl_dsi-imx Add a new dt property to the nwl_dsi-imx driver: sync-pol. This property represents the sync polarity of the input signal to it's internal DPI-to-DSI block. Signed-off-by: Robert Chiras <robert.chiras@nxp.com> Reviewed-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Robert ChirasRobert Chiras
f919dee3923MLK-16926-2: drm/panel Update Raydium panel If a GPIO pin is present, set it to LOW, so that the initial configuration comes from a LOW value on that pin. This patch was needed, since the panel driver had issues on MX8MQ. Also, use the bus specific flags from display timings flags in order to set them as display_info bus_flags. Signed-off-by: Robert Chiras <robert.chiras@nxp.com> Reviewed-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Robert ChirasRobert Chiras
67dfc71a939MLK-16926-1: arm64: dts: fsl-imx8mq-evk: Enable mipi-dsi with dcss Enabled DCSS-DSI-ADV7535 and DCSS-DSI-RM67191 paths on MX8MQ EVK development board. Signed-off-by: Robert Chiras <robert.chiras@nxp.com> Reviewed-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Fabio EstevamFabio Estevam
36515be8645MLK-16986-6: drm: mxsfb_crtc: Reset the eLCDIF controller According to the eLCDIF initialization steps listed in the MX6SX Reference Manual the eLCDIF block reset is mandatory. Without performing the eLCDIF reset the display shows garbage content when the kernel boots. In earlier tests this issue has not been observed because the bootloader was previously showing a splash screen and the bootloader display driver does properly implement the eLCDIF reset. Add the eLCDIF reset to the driver,...
Fabio EstevamFabio Estevam
a469f67f200MLK-16986-5: drm: mxsfb_crtc: Fix the framebuffer misplacement Currently the framebuffer content is displayed with incorrect offsets in both the vertical and horizontal directions. The fbdev version of the driver does not show this problem. Breno Lima dumped the eLCDIF controller registers on both the drm and fbdev drivers and noticed that the VDCTRL3 register is configured incorrectly in the drm driver. The fbdev driver calculates the vertical and horizontal wait counts of the VDCTRL3 reg...
Robert ChirasRobert Chiras
232262616d1MLK-16986-4: drm: bridge: adv7511: set bus_flags and bus_format For a proper initialization of the crtc driving the connector for this bridge, we need to set the bus_formats and bus_flags of the connector's display_info. Signed-off-by: Robert Chiras <robert.chiras@nxp.com> Reviewed-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Robert ChirasRobert Chiras
8768051360cMLK-16986-3: drm: mxsfb: fix connector handling Since the MXSFB initially was just a simple display pipe using a drm_panel, the drm_connector was created "in-house", by mxsfb driver. But, with latest changes, mxsfb also supports a bridge. In case of a drm_bridge, the the connector is created and initialized by that bridge. So, for a proper initialization during start-up, we need to take into consideration that connector, instead of our "in-house" connector. The connector created and initiali...
Stefan AgnerStefan Agner
c12d7051e35MLK-16986-2: drm: mxsfb: fix pixel clock polarity The DRM subsystem specifies the pixel clock polarity from a controllers perspective: DRM_BUS_FLAG_PIXDATA_NEGEDGE means the controller drives the data on pixel clocks falling edge. That is the controllers DOTCLK_POL=0 (Default is data launched at negative edge). Also change the data enable logic to be high active by default and only change if explicitly requested via bus_flags. With that defaults are: - Data enable: high active - Pixel clock...
Stefan AgnerStefan Agner
26e1d130602MLK-16986-1: drm: mxsfb: use bus_format to determine LCD bus width The LCD bus width does not need to align with the pixel format. The LCDIF controller automatically converts between pixel formats and bus width by padding or dropping LSBs. The DRM subsystem has the notion of bus_format which allows to determine what bus_formats are supported by the display. Choose the first available or fallback to 24 bit if none are available. Signed-off-by: Stefan Agner <stefan@agner.ch> Acked-by: Marek ...
Bai PingBai Ping
c39c7178ecaMLK-17082-02 ARM: dts: imx: Add dedicated dts for optee support on imx6sl/sll Add dedicated dts file to support optee on imx6sl/sll. The OCRAM is resized to make sure the OCRAM space used by TEE side is not visiable to no-secure linux kernel side. Signed-off-by: Bai Ping <ping.bai@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
Bai PingBai Ping
b54d479260fMLK-17082-01 ARM: imx: Add psci support in cpuidle for imx6sl/sll Using PSCI to handle low power idle when linux is running in no secure world. If the kernel is running in secure world, keep using the method we used before. Signed-off-by: Bai Ping <ping.bai@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
Robin GongRobin Gong
75cd6d8c284MLK-17072-2: ARM64: dts: freescale: imx8qm/qxp: enable MU as wakeup source Enable MU as wakeup source in dts. Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Robin GongRobin Gong
3b20aa779f3MLK-17072-1: soc: imx: sc: ipc: enable MU interrupt as wakeup source Currently, kernel still can be wakeup-ed by MU even without enabling it as a wakeup source. That's because of MU never off in suspend and scfw can wakeup A53 if MU interrupt not disabled or masked in GIC. But in a corner case that the MU interrupt coming after suspend_device_irqs, MU interrupt will be masked by below code in handle_fasteoi_irq: if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) { desc->i...
Adrian AlonsoAdrian Alonso
13070e650e9MLK-16929-3: dts: arm64: fsl imx8mq evk pdm mic support Add pdm mic support on imx8mq evk platform Hardware modifications connect PDM mic: PDM pin SAI-3 pad Test point ------------------------------------ BCLK SAI3_RXC TP1802 DATA SAI3_RXD TP1804 Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com> Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Adrian AlonsoAdrian Alonso
a7177af3157MLK-16929-2: sound: soc: fsl: imx pdm mic driver over SAI i.MX Sound SoC Audio support for PDM mics on SAI Set audio recording hardware constrains, support Sample rates: 8000, 16000, 32000, 48000, 64000 PDM decimation factor property fixed to 64 Number of channels: 1 Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com> Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Shengjiu WangShengjiu Wang
748001025d4MLK-16929-1: ASoC: fsl_sai: add bitclk_freq Allow set SAI bit clock frequency trough snd_soc_dai_set_sysclk function call on machine sound drivers. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
Shengjiu WangShengjiu Wang
f8b2d7339d1MLK-15985-3: ARM: dts: imx6sx: set frequency for S20_3LE format Select a proper frequency for S20_3LE/S24_LE/S16_LE. and disable the SSI2 when mqs enabled, for mqs only support 24.576MHz mclk. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Shengjiu WangShengjiu Wang
2e2fdd42f60MLK-15985-2: ARM: dts: imx6qdl: set freq for S20_3LE format select a proper freq for S20_3LE/S24_LE/S16_LE, the frequency can be divided by 24/32/16; Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Shengjiu WangShengjiu Wang
bfa0b768a39MLK-15985-1: ASoC: fsl_ssi: remove the wrong fix for S20_3LE This reverts commit 6ce4e9c184b7 ("MLK-15068: ASoC: fsl_ssi: fix the noise issue with S20_3LE Mono bitsream") The fix in MLK-15068 can't fix the mono noise issue, for using the physical width imply that the sample with is 24, but the CCSR_SSI_SxCCR_WL still using the 20 bit, the unalignment cause noise. Or if change the CCSR_SSI_SxCCR_WL to 24bit, the volume is lower for 24bit imply that the sample is shift 4bit right. So the cor...
Gao PanGao Pan
5eb61f82e89MLK-17075 arm64: dts: enable i2c0 and add sensor support imx8qm-mek enable i2c0 add sensor support imx8qm-mek: isl29023, fxos8700, fxas2100x, mpl3115 Signed-off-by: Gao Pan <pandy.gao@nxp.com>
Dong AishengDong Aisheng
033c0be97a4MLK-17074-10 soc: imx8: pm-domains: fix missing full intialization for root domain nodes Current power domain driver only setup all domain callbacks during second level power domains intialization. However, there're also some root power domain nodes having valid SC resource handler which may be used by device as well. Missing to setup them may result in some features lost on these domains. e.g. pd_dc0: PD_DC_0 { compatible = "nxp,imx8-pd"; reg = <SC_R_DC_0>; #power-domain-cells = <0>; #a...
Dong AishengDong Aisheng
b14b0941874MLK-17074-9 ASoC: cs42xx8: force suspend/resume during system suspend/resume Use force_suspend/resume to make sure clocks are disabled/enabled accordingly during system suspend/resume. Reviewed-by: Frank Li <frank.li@nxp.com> Reviewed-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Dong AishengDong Aisheng
f100af2f81fMLK-17074-8 soc: imx8: pm-domains: fix the wrong use of runtime_idle_active for pd mode selection There're fundanmental difference between the using of start/stop and pd mode selection. Start/stop actually can only reflect device state, not power domain state. So actually we're abusing it here. e.g. take a consider of two devices on the same domain. PD mode should be selected by power domain gorvernor or power domain core. This patch totally remove the wrong use of start/stop and runtime_id...