MLK-17074-7 mmc: sdhci-esdhc-imx: make sure clock is disabled during suspend
make sure clock is disabled during suspend
Reviewed-by: Haibo Chen <haibo.chen@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
MLK-17074-6 soc: imx8: pm-domains: use state_idx to distinguish the low power state
Use state_idx to distinguish the low power state.
Reviewed-by: Frank Li <frank.li@nxp.com>
Reviewed-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
MLK-17074-5 soc: imx8: pm-domains: add multiple states
MX8 power domain supports two low power modes: LP and OFF.
So adding them accordingly to make the power domain core be aware of it.
Reviewed-by: Frank Li <frank.li@nxp.com>
Reviewed-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
MLK-17074-4 soc: imx8: pm-domains: remove the status checking during power off
The power domain core alreadys checked it, no need check it anymore.
Besides that, removing it make the driver be able to switch to different
low power mode in the future. Identically the power on check is also
removed.
Reviewed-by: Frank Li <frank.li@nxp.com>
Reviewed-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
MLK-17074-3 PM / Domains: use default state 0 to enter for multi states domains
If no valid state idx specified by governor, we use the default state_idx
0 to enter in case the domain has multi low power states.
Reviewed-by: Frank Li <frank.li@nxp.com>
Reviewed-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
MLK-17074-2 PM / Domains: choose the deepest state to enter if no devices using it
For a domain belongs to no devices anymore, let's choose the deepest state
to enter to save power.
Reviewed-by: Frank Li <frank.li@nxp.com>
Reviewed-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
MLK-17074-1 PM / Domains: support enter deepest state for multiple states domains
Currently the generic power domain suspend code pm_genpd_suspend_noirq
will try to power off a domain used by devices in genpd_sync_poweroff
if its status is not GPD_STATE_ACTIVE.
However, for power domains supporting multiple low power states, it may
already enter an intermediate low power state by runtime PM before system
suspend and the status is already GPD_STATE_POWER_OFF which results in
then the power d...
MLK-17061-2 arm64: dts: add interrupt-open-drain property for sensors
add interrupt-open-drain property for sensors
Signed-off-by: Gao Pan <pandy.gao@nxp.com>
(cherry-picked from 7b8cd1c5d94f4e2ea5462ca490da6e8f125c92cf)
MLK-17061-1 sensor: set sensor interrupt pins as open-drain
The sensors share an interrupt pin on imx8qm/imx8qxp mek.
As a result, the interrupt signals will be interfered by
each other in default push-pull status.
This patch sets sensor interrupt pins as open-drain when
necessary.
Signed-off-by: Gao Pan <pandy.gao@nxp.com>
(cherry-picked from 48bcb7aafa2a3ced923d1a1753bb19d89a9fc273)
MLK-17033: ath10k: fix suspend/resume fail issue
qca6174 wifi driver causes system hang during suspend/resume stress test.
This patch fix this suspend/resume fail issue.
Signed-off-by: Andy Duan <fugang.duan@nxp.com>
Signed-off-by: Gao Pan <pandy.gao@nxp.com>
(cherry-picked from 72fbaf4aa36e7407108d1c0b7d857287f84bee3d)
MLK-17025-2 dts: imx8mq-evk: use internal clock as MCLK source for camera
use internal CLKO2 as camera's MCLK. it's 20MHz, derived from the
parent clock IMX8MQ_SYS2_PLL_200M
Signed-off-by: Robby Cai <robby.cai@nxp.com>
Reviewed-by: Sandor Yu <sandor.yu@nxp.com>
(cherry picked from commit 6bf9f6c7d0bcc62bd526bfb112bab91e916274b6)
MLK-17025-1 media: camera: use the CLKO2 from SoC as MCLK for camera
use internal clock as MCLK source for camera ov5640.
The driver will adjust the setting for ov5640 accordingly.
Signed-off-by: Robby Cai <robby.cai@nxp.com>
Reviewed-by: Sandor Yu <sandor.yu@nxp.com>
(cherry picked from commit 9bed75aca0b355e41279622407fd30c8b670445b)
MLK-16959: crypto: caam Add CAAM page 0 definition in device tree
Add definition of CAAM page 0 in the device tree.
This page is only accessible by the CPU in secure world.
this is defined by the secure-status.
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
MLK-17034-6: ASoC: fsl_spdif: Move clock operation to pm runtime function
In imx8 when systerm enter suspend state, the power of subsystem will be
off, the clock enable state will be lost after resume, but the runtime
resume function will be called after resume by pm, so need to move clock
enablement to runtime resume and clock disablement to runtime suspend.
Then after resume the clock enable state can be recovered.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
MLK-17034-5: ASoC: fsl_mqs: Move clock operation to pm runtime function
In imx8 when systerm enter suspend state, the power of subsystem will be
off, The clock enable state will be lost after resume, but the runtime
resume function will be called after resume by pm, so need to move clock
enablement to runtime resume and clock disablement to runtime suspend.
Then after resume the clock enable state can be recovered.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
MLK-17034-4: ASoC: wm8960: add pm runtime suspend and resume
Add clock enablement in runtime resume and clock disablement in
runtime suspend
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
MLK-17034-3: ASoC: imx-wm8960: remove clk operation in startup/shutdown
In imx8 when systerm enter suspend state, the power of subsystem will be
off, the clock enable state will be lost after resume, the startup
function isn't called after resume, so the clock will be enabled after
resume, the clock operation should be moved to pm runtime resume function.
For the mclk is for codec, this clock enablement and disablement will be
move to code driver's runtime resume and runtime suspend
Signed-...
MLK-17034-2: ASoC: fsl_sai: Move clock operation to pm runtime function
In imx8 when systerm enter suspend state, the power of subsystem will be
off, the clock enable state will be lost after resume, but the runtime
resume function will be called after resume by pm, so need to move clock
enablement to runtime resume and clock disablement to runtime suspend.
Then after resume the clock enable state can be recovered.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
MLK-17034-1: ASoC: fsl_esai: Move clock operation to pm runtime function
In imx8 when systerm enter suspend state, the power of subsystem will be
off, The clock enable state will be lost after resume, but the runtime
resume function will be called after resume by pm, so need to move clock
enablement to runtime resume and clock disablement to runtime suspend.
Then after resume the clock enable state can be recovered.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
MLK-16980 arm64: dts: imx8mq: adjust the cma allocation
To resolve the confliction between CMA and the M4 reserved
memory region. Adjust the cma size and range.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Anson Huang <anson.huang@nxp.com>
MLK-17023 drm/imx: ldb: Align HSYNC and VSYNC polarities with PHY in DE mode
When an external display device works in data enable(DE) mode,
it usually provides video mode(s) without HSYNC and VSYNC
polarities via display flags. In this case, the controller(LDB)
and the LVDS PHY still need to align the two signal polarities
with each other respectively. Otherwise, polarities generated
by default register values may cause mismatch polarities and
display artifacts. With the DE mode JDI TX26D...
MLK-17022 drm/panel: panel-simple: Correct JDI TX26D202VM0BWA panel display timing flags
The JDI TX26D202VM0BWA panel works in data enable(DE) mode.
Apparently, the panel's data enable signal is active high
according to the panel spec. This patch corrects the DE
signal polarity from active low to active high.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
MLK-17003: hdmi: More delay need for hdmi phy init
DRM core waits for 50ms for a vblank interrupt to come
after changing the mode. But in video mode change from
4Kp60 to 480p60 case, the VBLANK interrupt is not coming
in 50ms, drm core driver will dump the followed warning
information.
[ 1034.956833] [CRTC:25] vblank wait timed out
[ 1034.961069] ------------[ cut here ]------------
[ 1034.965702] WARNING: CPU: 0 PID: 3485 at
/home/bamboo/build/4.9.51-8mq-beta/fsl-imx-internal-xwayland/temp...
MLK-17037: arm64: dts: change the fspi AHB memory size to 256M
Change the flexspi0 AHB memory size to the correct 256M.
Signed-off-by: Han Xu <han.xu@nxp.com>
MLK-16952 crypto: caam: fsl-imx8mq.dtsi: Enable job ring 0
Test/Validation Team needs all job rings enabled in the device-tree
but only JR0 and JR1 are accessible by the Kernel.
JR2 has different JR Master ID domain owner than Kernel Domain.
Signed-off-by: Aymen Sghaier <aymen.sghaier@nxp.com>
MLK-16951 security: Add tcrypt to be built out as module and other modules
Enable CONFIG_CRYPTO_TEST=m needed by Test / Validation Team, and then
other needed modules used by tcrypt are enbled.
Signed-off-by: Aymen Sghaier <aymen.sghaier@nxp.com>
MLK-16950 crypto: caam: Fix failed to flush job ring 0
This error occurred on MX8M-EVK while initializing the first job ring.
If the job ring was used before Kernel level, then connecting it to the
irq handler could generate error due to its (unknown) previous state.
This patch calls the hardware reset function before connecting the irq
handler.
Signed-off-by: Aymen Sghaier <aymen.sghaier@nxp.com>
MLK-17032-2: drm: imx: dcss: fix runtime suspend/resume
If the DCSS core is runtime suspended, but the display-subsystem is not,
we need to resume the DCSS core before setting up DTG and SUBSAM
modules.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
MLK-17032-1: arm64: dts: imx8mq: Fix DCSS suspend/resume issue
This commit:
6362b8c - MLK-17014-2 ARM64: dts: imx8mq: move 'display-subsystem' node
to dtsi file
moved the display-subsystem node to dtsi, before the DCSS node definition. This
made the DCSS core suspend/resume after display-subsystem. However, the DCSS
clocks need to be enabled first.
This patch moves the display-subsytem definition after the DCSS and HDMI PHY nodes.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu...
MLK-17016 arm64: dts: fsl-imx8qm-mek: Add support for MIPI-DSI with adv7535 and rm67191
This patch addes MIPI-DSI support with the ADV7535 DSI-HDMI converter
and DSI Panel Raydium RM67191 for the i.MX8QM MEK board.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
MLK-16992-2: drm: imx: dcss: enable/disable all clocks during suspend/resume
Clocks were not properly disabled during suspend. This patch will
disable all clocks during suspend.
Also, remove the hardcoded clocks' rates. These will be set through DTB.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
MLK-16992-1: drm: imx: dcss: Do not request bus_freq twice
Make sure we request/release the bus_freq exactly once.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
MLK-17014-3 ARM64: dts: imx8mq: move hdmi 'port@0' node to dtsi file
It is better to put the hdmi 'port@0' node definition
to 'fsl-imx8mq.dtsi' file.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
MLK-17014-2 ARM64: dts: imx8mq: move 'display-subsystem' node to dtsi file
It is better to put the 'display-subsystem' node definition
to 'fsl-imx8mq.dtsi' file.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
MLK-17014-1 ARM64: dts: imx8mq: move 'dcss_disp0' node to dtsi file
The 'dcss_disp0' node definition is better to be put
into the dcss node definition in 'fsl-imx8mq.dtsi'.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
MLK-16604-3 dt-bindings: usb: xhci: add usb3-resume-missing-cas property
There is already one quirk for usb3 xhci flag XHCI_MISSING_CAS, for
those platform with OF we can use usb3-resume-missing-cas to enable
this quirk to work around usb3 resume from system sleep.
Signed-off-by: Li Jun <jun.li@nxp.com>
Acked-by: Peter Chen <peter.chen@nxp.com>
MLK-16604-2 arm64: dts: imx8mq: add usb3-resume-missing-cas for usb3
Add usb3-resume-missing-cas property for imx8mq usb3 to work around
the usb3 resume if the usb3 device plugged in while in system sleep.
Signed-off-by: Li Jun <jun.li@nxp.com>
Acked-by: Peter Chen <peter.chen@nxp.com>
MLK-16604-1 usb: host: xhci-plat: add XHCI_MISSING_CAS quirk
i.MX8MQ USB3 host needs XHCI_MISSING_CAS quirk to warm reset the port to
enum the USB3 device plugged in while system sleep, as the port state is
stuck in polling mode after resume.
Signed-off-by: Li Jun <jun.li@nxp.com>
Acked-by: Peter Chen <peter.chen@nxp.com>
MLK-16820-5 dt-bindings: typec: add documentation for tcpci
TCPCI stands for typec port controller interface, its implementation
has full typec port control with power delivery support, it's a
standard i2c slave with GPIO input as irq interface, detail see spec
"Universal Serial Bus Type-C Port Controller Interface Specification
Revision 1.0, Version 1.1"
Signed-off-by: Li Jun <jun.li@nxp.com>
Acked-by: Peter Chen <peter.chen@nxp.com>
MLK-16820-4 dt-bindings: typec: add basic typec properties
port-type is required for any typec port; default-role is only required
for drp; power source capable needs src-pdos; power sink capable needs
snk-pdos, max-snk-mv, max-snk-ma, op-snk-mw.
Signed-off-by: Li Jun <jun.li@nxp.com>
Acked-by: Peter Chen <peter.chen@nxp.com>
MLK-16820-3 arm64: dts: fsl-imx8qxp-mek: use sink-disable for typec
As we need drp config for typec data role, so change the port type
to be drp and add a sink-disable property for it.
Signed-off-by: Li Jun <jun.li@nxp.com>
Acked-by: Peter Chen <peter.chen@nxp.com>
MLK-16820-2 staging: typec: tcpci: add sink_disable flag for source only power
As we need to use DRP config for data role, but the power role is source only,
so introduce a property sink-disable to avoid sink vbus command.
Signed-off-by: Li Jun <jun.li@nxp.com>
Acked-by: Peter Chen <peter.chen@nxp.com>
MLK-16820-1 staging: typec: tcpm: don't do source debounce if remote keep Rp
While TRY.SRC, if the remote keeps the Rp and we also enable Rp,
there will be a disconnect, this disconnect should be ignored,
then either the remote further enable Rd before timeout to have
a succeed TRY.SRC, or TRY.SRC timeout and start to sink.
Signed-off-by: Li Jun <jun.li@nxp.com>
Acked-by: Peter Chen <peter.chen@nxp.com>
MLK-17012 ARM: dts: imx: update vdd_soc setpoint voltage on imx6sll
According to the latest datasheet(Rev. 0.2, 11/2017), the
VDD_SOC_IN voltage can be set to 1.15V always, no constrain
between VDD_SOC_IN and VDD_ARM_IN, so change the voltage
of VDD_SOC_IN for 996MHz setpoint to 1.175V as other setpoints.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
MLK-14697 ARM: dts: imx: update the setpoint data of imx6sll
According to the latest datasheet(Rev.0 4/2017), The voltage of
996MHz should be updated to 1.23V. For NXP's Pfuze PMIC chip, the
minimum voltage step is 25mV, we need to set the voltage of 996MHz
to 1.25V. In order to cover board tolerance and IR drop, we add
25mV margin. Then the 996MHz setpoint voltage is 1.275V.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
(cherry picked from commit 4d40b3a6149e53f60f3cc6a14da1f2ffc55efb8e)
