Commits
Robert Chiras committed 185128c03d1
MLK-16986-1: phy: Fix Mixel PHY driver best_match When setting up the CM, CN and CO decimal values for DPHY PLL, these values should only be rounded up when a "best_match" is requested. Some DSI receivers requires the DSI clock to be exactly matched with the pixel clock. Signed-off-by: Robert Chiras <robert.chiras@nxp.com> Reviewed-by: Laurentiu Palcu <laurentiu.palcu@nxp.com