Commits
Shengjiu Wang committed 23f77d0e2c3
MLK-14761: ASoC: fsl_esai: fix esai sync mode can't work In ESAI synchronous mode, the clock is generated by Tx, So we should always set registers of Tx which relate with the bit clock and frame clock generation (TCCR, TCR, ECR), even there is only Rx is working. Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com> Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>