Commits
Shengjiu Wang committed ce192177484
MLK-14781-2: ARM: dts: change audio pll frequency for ssi master mode Original frequency 786.432MHz can't be divide to frequency 2.304MHz which is needed by 48kHz/24bit/2channel, So update the pll frequency for 24bit case. Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com> Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>