MLK-16013-7 usb: dwc3: gadget: increase timeout count for ep cmd
Increase the timeout value for wait ep command complete, this is temp
solution to workaround it but no harm any good cases.
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
MLK-16013-6 Documentation: usb: dwc3: add suspend clk setting
Add dt documentation for specify the suspend clk and its caculation.
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
MLK-16013-5 ARM64: dts: imx8mq: add power-down-scale property
As i.mx8mq USB3 suspend clock setting is 32KHz, and the default
power down scale setting is not correct, so add a property to
fix it.
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
MLK-16013-4 usb: dwc3: add suspend_clk setting interface
Some dwc3 based USB3 IP may have a wrong default suspend clk
setting, so add an interface to correct it by dts property.
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
MLK-16013-3 usb: dwc3: of-simple: add imx8mq usb support
Add i.mx8mq USB3 phy compatible string for dwc3-of-simple driver.
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
MLK-16013-2 phy: add imx8mq usb phy driver
Use generic phy driver for i.mx8mq USB3 phy reset and clock enable.
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
MLK-16013-1 ARM64: dts: fsl-imx8mq: add controller glue layer and phy node
Restruct i.mx8mq usb3 dts node, add phy and of-simple node, use of-simple
driver to handle the glue layer as there is only clock handling right now,
use generic phy driver model to handle the phy init.
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
arm64: dts: freescale: Fix asrc1 node address
According to DMA_Audio_8X_v0.5.04.docx, ASRC1
is mapped at 0x59000000 + 0x800000 = 0x59800000.
Most likely, the current value is a copy/paste error
from ASRC0.
Fixes: cc20b6b242 ("MLK-15317-5: ARM64: dts: Add asrc1 node definition")
Reported-by: Viorel Suman <viorel.suman@nxp.com>
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
MLK-16089: mtd: gpmi-nand: calculate the correct free oob space for large oob layout setting
for the large oob layout setting, need to calculate the correct free oob
space.
Signed-off-by: Han Xu <han.xu@nxp.com>
MLK-16073 ARM64: dts: enable pcie on imx8qxp mek board
Enable the pcie support for iMX8QXP MEK board.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
MLK-15141-1: PCI: imx: Add epdev_on regulator for 8QM WiFi
Add the epdev_on regulator to power up the WiFi module
on the iMX8QM board.
This regulator needs to be powered up before the pcie
link, in order for the WiFi module to work.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Tiberiu Breana <andrei-tiberiu.breana@nxp.com>
MLK-16042-3: Enable bcmdhd v1.363 for imx8
Enable cfg80211 and the bcmdhd pcie version in arm64 defconfig.
Signed-off-by: Tiberiu Breana <andrei-tiberiu.breana@nxp.com>
MLK-16042-2: net: wireless: bcmdhd_1363: Add dts fw parse support
Add support for parsing the fw_path and nv_path parameters
from dts files.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Tiberiu Breana <andrei-tiberiu.breana@nxp.com>
MLK-16042-1: Add bcmdhd v1.363 PCIE driver
Add another bcmdhd driver version (v1.363) for PCIE devices.
This will be used for WiFi modules such as Murata 1FD (BCM89359)
or 1CX (BCM4356).
Signed-off-by: Tiberiu Breana <andrei-tiberiu.breana@nxp.com>
MLK-16077-3: ARM64: defconfig: built in the wm8960 sound card
built in the wm8960 sound card
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
MLK-16077-1: irqchip: intmux: add interrupt multiplexing support
The intmux module is used to output internal interrupt in subsystem
to system with 32-to-8 configuration. It has several multiplex
channels depends on system. intmux is introduced in KL28Z reference
manual.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
MLK-13471: fxls8471: add a symbol export to fix module build
When CONFIG_SENSOR_FXLS8471=m build was failing due to missing
exported symbol. This patch export the missing symbol.
Signed-off-by: Julien Olivain <julien.olivain@nxp.com>
MLK-13472: hwmon: mxc_mma8451: add empty sentinel entry at the end of i2c_device_id table
This is fixing the build when the driver is enabled as a module, when
CONFIG_MXC_MMA8451=m
Signed-off-by: Julien Olivain <julien.olivain@nxp.com>
MLK-16075-21 drm/imx: dpu: kms: Add several YUV pixel formats support
This patch adds several YUV pixel formats support for dpu kms.
The pixel formats are YUYV, UYVY, NV12, NV21, NV16, NV61, NV24 and NV42.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
MLK-16075-20 drm/imx: dpu: plane: Use a better way to calculate base address
This patch uses the helper drm_format_plane_cpp() to calculate base address
so that we can calculate correctly for the YUV pixel formats as well.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
MLK-16075-19 gpu: imx: dpu: common: Add fetchecos support in dpu plane group
This patch adds fetchecos support in dpu plane group.
We currently supports fetcheco0 and fetcheco1.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
MLK-16075-18 gpu: imx: fetchdecode: Add several YUV pixel formats support
This patch adds several YUV pixel formats support for fetchdecode.
The pixel formats are YUYV, UYVY, NV12, NV21, NV16, NV61, NV24 and NV42.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
MLK-16075-17 gpu: imx: dpu: fetchdecode: Add helper fetchdecode_need_fetcheco()
This patch adds helper fetchdecode_need_fetcheco() so that users may
check if a fetchdecode needs to use fetcheco for a specific pixel format.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
MLK-16075-16 gpu: imx: dpu: fetchdecode: Add helper fetchdecode_get_fetcheco()
This patch adds helper fetchdecode_get_fetcheco() so that users may
get the relevant fetcheco via fetchdecode.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
MLK-16075-15 gpu: imx: dpu: fetchdecode: Specify DPU_VPROC_CAP_FETCHECO0/1 cap
This patch specifies DPU_VPROC_CAP_FETCHECO0/1 video processing
capabilities of fetchdecode.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
MLK-16075-14 gpu: imx: dpu: fetchdecode: Add fetchdecode sources for DPU v2
This patch adds fetchdecode sources for DPU version2.
Logics are tweaked to split DPU version1 and version2.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
MLK-16075-13 video: dpu: Add more sources for fetchdecode
This patch adds more sources for fetchdecode.
The new sources are fetchdecode0, fetchdecode1 and fetchwarp2,
which are valid only on DPU v2.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
MLK-16075-12 gpu: imx: dpu: common: Add helpers dpu_vproc_has/get_fetcheco_cap()
This patch adds helpers dpu_vproc_has/get_fetcheco_cap() support
so that the users may check if a video processing mask has fetcheco
capability or get the fetcheco capability from the mask.
We currently only support fetcheco0 and fetcheco1.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
MLK-16075-11 gpu: imx: dpu: Add basic fetcheco units support
This patch adds basic fetcheco units support.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
MLK-16075-10 gpu: imx: dpu: common: Add helpers to get plane w/h of format
This patch adds helpers dpu_format_plane_width/height() to get plane
width or height of pixel formats which are supported by the current
dpu base driver.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
MLK-16075-9 gpu: imx: dpu: common: Add helper to get number of planes of format
This patch adds a helper dpu_format_num_planes() to get number of planes
of pixel formats which are supported by the current dpu base driver.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
MLK-16075-8 gpu: imx: dpu: common: Add helpers to get sub-samplings of pfmt
This patch adds helpers dpu_format_horz/vert_chroma_subsampling() to
get horizontal or vertical sub-samplings of pixel formats which are
supported by the current dpu base driver.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
MLK-16075-7 gpu: imx: dpu: prv: Add several YUV pixel format definitions
This patch adds several YUV pixel format definitions in
array dpu_pixel_format_matrix[]. The pixel formats are
YUYV, UYVY, NV12, NV21, NV16, NV61, NV24 and NV42.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
MLK-16075-2 gpu: imx: dpu: prv: Cleanup definitions for YUV conversion mode bits
This patch cleans up definitions for the YUV conversion mode register field.
Two macros are introduced for users to program the field easily.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
MLK-16075-1 gpu: imx: dpu: fetchdecode: Update funcs to enable/disable src buf
The bit to enable/disable source buffer is embedded in the register
LAYERPORPERTY0. However, the other bits of the register may have
other functionalities. So, using fetchdecode_layerproperty() to
enable/disable source buffer isn't appropriate. This patch uses
new functions to enable/disable fetchdecode source buffer so that
the function names could be a bit specific about what they are doing.
Signed-off-by: L...
MLK-16086 tty: serial: lpuart: add port.lock to protect registers accessing in suspend
Add port.lock to protect register accessing in suspend/resume function.
Disable RIE and ILIE before DMA chan is ternminated in suspend function.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
MLK-13473: imx_sim: fix module device table name
This fixes the build when this driver is built as a module, when
CONFIG_MXC_SIM=m
Signed-off-by: Julien Olivain <julien.olivain@nxp.com>
MLK-16053 ARM64: defconfig: add pcie support in defconfig
Add the pcie support in defconfig for 64bit imx socs.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
MLK-16074 PCI: imx: correct some bits configiration of hsio
- Both APB_RST_0 and APB_RST_1 should be asserted, when PHYX2
is used.
Otherwise, PHYX2 can't finish calibration.
- Correct the PCIEB(PHYX2_1) TX PLL locked check.
- The clear check of the reset should be done after
clks are enabled
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
MLK-16067 tty: serial: lpuart: enable wakeup source in .suspend_noirq()
When use lpuart with DMA mode as wake up source, it still switch to
cpu mode in .suspend() that enable cpu interrupts RIE and ILIE as
wakkup source. When the wakeup signal coming while rx dma chan is
already teminated down, then driver should not call irq handler to
submit the new dma descriptor.
Enable the wakeup irq bits in .suspend_noirq() and disable the wakeup
irq bits in .resume_noirq().
Signed-off-by: Fugang Dua...