MLK-16120 gpu: imx: dpu: fetchdecode: Use interpolate upsampling mode for NV16/61
According to dpu spec, we should use interpolate upsampling mode for NV16/61.
This patch changes the mode from replicate to interpolate for the two pixel
formats.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
MLK-16108 PCI: imx: turn on pd for imx8mq pcie
Root cause:
Poewr domain of the PCIEs are turned off, and
not turned on properly in previous ATF.
The PDs of PCIE1/2 have the dependency.
Both of the PDs should be operated at same time.
This issue is gone after update the PDs operations
in ATF.
In order to make sure that the PDs are turned on,
Turn power domain for imx8mq pcie explicitly in
driver.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
MLK-16121-2 arm64: dts: freescale: imx8mq: add over-drive mode support
i.MX8MQ can run at over-drive mode, it will need to increase
VDD_ARM voltage, add new dtb to support it, this feature
is only available on A1 board with GPIO1_IO13 to control
VDD_ARM voltage.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
MLK-16121-1 cpufreq: imx8mq: add gpio regulator support
i.MX8MQ can run at over-drive mode which needs
increasing VDD_ARM voltage, add gpio regulator support
for over-drive mode.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
MLK-16114: RPMSG: Fixed ulp can't boot after e12586
Need call MU_Init before call other function
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com>
MLK-16109-2 arm64: defconfig: add CONFIG_DEVICE_THERMAL support
Add CONFIG_DEVICE_THERMAL support by default.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
MLK-16109-1 thermal: qoriq: add device cooling support
On i.MX8MQ, once temperautre exceeds hot threshold, some
modules like GPU etc. can reduce its frequency to cool down
the chip. All modules can register this device cooling
notifier to receive thermal HOT notification.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
arm64: dts: freescale: imx8qm: add reserve memory for rpmsg
RPMSG needs to share memory with M4, and SCD needs to set
this shared memory property accordingly, so the memory
region needs to be fixed.
Here make CMA range same as its size, so that SCD only sets
this region as share property. And also reserve another
4MB for RPMSG.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
MLK-16104-2 dma: imx-sdma: add index for multi sdma devices case
On i.mx8mscale, there are two sdma instances here, and common dma
frameowrk will get channel dynamicly from any available channel whatever
it's from the first sdma device or the second sdma device. But actually,
some IP like SAI only work in sdma2 not sdma1. To make sure get sdma
channel from the right sdma device, add index to match.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
MGS-3145 gpu: dts: update GPU clock parent on i.MX8MQ
Referred to the mscale design document, GPU has the designated clock PLL
targeting for 800MHz, update the assigned-clk-parent to GPU_PLL_OUT in
GPU device tree, fsl-imx8mq.dtsi.
Signed-off-by: Chenyan Feng <ella.feng@nxp.com>
MLK-16102 driver: clk: fix clock source sels for gpu ahb on i.mx8mq
One of the GPU clock source should be from 'gpu_pll_out', not gpu_pll'.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
MLK-16099-2: ASoc: fsl: length is not same for alloc and free memory
In fsl_hifi4_probe(), the length for dma_alloc_coherent() is
MSG_BUF_SIZE + INPUT_BUF_SIZE + OUTPUT_BUF_SIZE +
FIRMWARE_DATA_BUF_SIZE + SCRATCH_DATA_BUF_SIZE;
However, in fsl_hifi4_remove(), the length for dma_free_coherent()
is MSG_BUF_SIZE + INPUT_BUF_SIZE + OUTPUT_BUF_SIZE +
FIRMWARE_DATA_BUF_SIZE;
By keeping the same length between dma_alloc_coherent() and
dma_free_coherent() to fix this issue.
Signed-off-by: Weiguan...
MLK-16099-1: ASoc: fsl: fix crash issue when no dsp core lib
When dsp driver can't find the dsp core lib in loading codec
process, the kernel will be crashed. This issue is caused
by unreasonable way of error handling.
By changing the way of error handling to fix this issue.
Signed-off-by: Weiguang Kong <weiguang.kong@nxp.com>
MLK-16093-3 cpufreq: imx8mq: add cooling device support
Add i.MX8MQ cooling device support, when temperature
exceeds passive threshold, cpu-freq will drop to lowest
set-point, and once temperature drops below passive
threshold, cpu-freq will restore.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
MLK-16093-2 thermal: qoriq: add necessary callbacks for cooling support
Add get_trend and set_trip_temp to support i.MX8MQ cooling
device, get_trend is to customize cooling governor behavior,
once temperature exceeds passive trip, cooling device will work
at full function, and set_trip_temp is for updating trip
temp when do thermal test via modifying trip temp from sysfs.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
MLK-16093-1 arm64: dts: freescale: imx8mq: add cpu cooling device
Add cpu cooling device support for i.MX8MQ.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
MLK-15978 arm64: dts: imx8: change can clock rate to 40Mhz
CAN needs at least 40Mhz PE clock rate to support CAN FD well.
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
MLK-16101 MU: avoid read mu version register every scu call
Generally read mu registers will take about 225ns.
Overall scu_clk_enable function takes about 8000ns to 150000ns.
Although read version register just take 3% time,
it is not necessary to read version register every time.
Signed-off-by: Frank Li <Frank.Li@nxp.com>
MLK-16062-5: dts: i.MX8QM arm2 default support 4 mipi sensors
i.MX8QM can support 4 camera sensors or 8 camera sensors.
For eight sensors case, it must need all eight sensors on board,
and for four sensors case, it must need all four sensors on board,
otherwise all mipi sensor can't work.
Four mipi sensors case is more popular than eight sensors.
so change to default support four sensors.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
MLK-16007-2: ASoC: fsl_asrc: Enable automatic configuration for P2P
Use automatic selection of processing options and internal measured
ratio for P2P conversions.
The conversion done by ASRC depends on the IPG master clock frequency
that can have any value between 130MHz and 200MHz. The documentation
states that to support 10 channels with 192KHz sampling rate the
master clock frequency must be at least 160MHz.
When the master clock cannot be configured to faster frequencies the
ASRC can st...
MLK-16007-1: ASoC: fsl_asrc: Fix automatic mode configuration
Fix configuration for automatic selection of processing options and
internal measured ratio.
ASRC can automatically select its pre-processing and post-processing
options based on the frequencies it detects. To use this option the
two parameter registers ASR76K and ASR56K must be correctly configured
based on IPG clock frequency and the corresponding ATSx bits from the
ASRCTR register must be set.
When both the input sampling clo...
MLK-16095-01 i2c: mux: pca954x: add i2c bus switch PCA9646 chip support
Add i2c bus switch PCA9646 chip support, which 2-wire bus switch
and buffered 4-channel.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
MLK-16097-2 PCI: imx: specify the imx8qxp form imx8qm
On iMX8QM, functions of PCIEB relied on PCIEA.
But PCIEB used on iMX8QXP can work standalone.
Specify the iMX8QXP PCIE in driver.
Up to now, only iMX6QP PCIE may use the EXT OSC,
specify the EXT/EXT_SRC clocks for iMX6QP only.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
MLK-16097-1 ARM64: imx8qxp: distinguish qm and qxp for pcie
Use imx8qxp to specify the imx8qxp pcie support
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
MLK-16052-2 PCI: imx: fix the pcieb link down issue
The calibration value of PCIEA is mandatory required
by PCIEB on iMX8QM.
The RSTs of the PCIEA would be cleared when the PDs
of PCIEA are turned off.
The calibration value of PCIEA would be lost when the
RSTs of PCIEA are cleared.
So, the RSTs of PCIEA should be asserted when enable
the PCIEB port. Otherwise, PCIEB wouldn't be functional.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
MLK-16052-1 arm64: imx8qm: refine pcie power on imx8qm
- Refine the pd definitions of the imx8qm/qxp hsio.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
MLK-15986-7: video: fbdev: Add MIPI DSI NORTHWEST support for 64bit platforms
This patch adds support for 64bit platforms, on top of existing 32bit
support. Among some noticeable differences that occurred for the MIPI DSI
Northwest controller: 4 lane support is added and power management differs.
MIPI DSI Northwest driver changes are added from Fancy Fang's commit
df47fccaf6 "MLK-15322-8 video: fbdev: imx_northwest_dsi: enable Northwest
mipi dsi driver".
Signed-off-by: Cristina Ciocan <cri...
MLK-15986-6: video: fbdev: Add LCDIF 64bit support
This patch enables LCDIF support for 64bit platforms.
Code for the LCDIF can be found in drivers/video/fbdev/mxsfb.c. Add 64bit
debug conditional directives to LCDIF code since this is a new option for
64bit platforms.
LCDIF driver changes are added from Fancy Fang's commit c12dd5e1c24c
("MLK-15322-4 video: fbdev: imx: lcdif: enable lcdif driver for imx8mq").
Signed-off-by: Cristina Ciocan <cristina-mihaela.ciocan@nxp.com>
MLK-15986-4: video: fbdev: Separate display framework code from fb driver code
The display driver framework code in drivers/video/fbdev/mxc/mxc_dispdrv.c
is currently compiled along with fb driver code in
drivers/video/fbdev/mxc. This is a framework that is also used by another
fb driver that can be found in drivers/video/fbdev/mxsfb.c.
This patch separates the framework compilation by pulling it into its
own CONFIG_FB_MXC_DISP_FRAMEWORK that can be selected by any fb driver
and/or panel wh...
MLK-16013-8 ARM64: dts: imx8mq: add dis_u2_susphy_quirk for usb
This is temp workaround to resolve usb host enumeration issue
by disable usb2 phy suspend.
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
