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AuthorCommitMessageCommit Date
Robin GongRobin Gong
72bbf89ed14MLK-16202-01 driver: regulator: add enable/disable for switch for pfuze100 Add enable/disable support for switch regulator on pfuze100. Signed-off-by: Robin Gong <yibin.gong@nxp.com> Signed-off-by: Bai Ping <ping.bai@nxp.com>
Bai PingBai Ping
cbf1ec82a3aMLK-16209 ARM: dts: imx: add 'regulator-always-on' property for pmic sw4 Add 'regulator-always-on' for PMIC SW4 switch regulator. Signed-off-by: Bai Ping <ping.bai@nxp.com>
Peng FanPeng Fan
727445eb077MLK-16204-5: arm64: defconfig: build nvmem and ocotp Build NVMEM and OCOTP driver Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng FanPeng Fan
7ac029fb9cbMLK-16204-4: nvmem: imx-ocotp: add i.mx8mq support and fix read Add i.MX8MQ support and Fix read. When offset is not 4 bytes aligned, directly shift righty by 2 bits will cause reading out wrong data. Since imx ocotp only supports 4 bytes reading once, we need handle offset is not 4 bytes aligned and enlarge the bytes to 4 bytes aligned. After finished reading, copy the needed data from buffer to caller and free buffer. Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng FanPeng Fan
f6768313b99MLK-16204-3: clk: imx8mq: add ocotp clock Add OCOTP clock support. Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng FanPeng Fan
163a8ef2605MLK-16204-2 arm64: dts: add ocotp node Add ocotp node. Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng FanPeng Fan
dfbf42df5f7MLK-16204-1 nvmem: add imx-scu-ocotp driver Add imx-scu-ocotp driver to support i.MX8QM/QXP. The usage, add an entry in ocotp node, such as the test_1 entry: ocotp: ocotp { #address-cells = <1>; #size-cells = <1>; compatible = "fsl,imx8qm-ocotp", "syscon"; test_1: test_1@40 { reg = <0x41 0x8>; bits = <4 40>; }; }; Then in your device node, add this: node:...
Fancy FangFancy Fang
2fea94bbfd0MLK-16123 video: fbdev: dcss: change a print level to be debug Change a 'dev_info' call to 'dev_dbg' call to avoid possible too many kernel messages printed out. Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy FangFancy Fang
95a8c6a629eMLK-16205 video: fbdev: dcss: handle cfifo wrapping case As time goes on, the cfifo buffer is close to be exausted. And since the cfifo is a ring buffer, so at this moment, the cfifo needs to be wrapped to the buffer beginning. In this driver, the fifo wrapping condition is that the free size to buffer end is less than the commit size. And before the buffer wrapping, the 'ctxld_wq' workqueue needs to be flushed to make sure all the previous commited jobs to be finished. Besides, this commit ...
Liu YingLiu Ying
6338ab53da2MLK-16207-4 arm64: dts: fsl-imx8qxp-mek: Add LVDS2HDMI it6263 bridge(s) support This patch adds LVDS to HDMI it6263 bridge(s) support on the i.MX8qxp MEK platform. Since the platform supports up to two it6263 bridge(s) via daughter cards plugged into mini-SAS connectors, this patch introduces several DT sources so that users may choose relevant DT blob to use single or dual it6263 display. Signed-off-by: Liu Ying <victor.liu@nxp.com>
Liu YingLiu Ying
e8e6094de5dMLK-16207-3 arm64: dts: fsl-imx8qxp-mek: Enable dpu1 This patch enables dpu1 DT node. Signed-off-by: Liu Ying <victor.liu@nxp.com>
Liu YingLiu Ying
4eabd2de6e9MLK-16207-2 drm/bridge: it6263: 2nd time to workaround cable detection failure There is cable detection failure issue on i.MX8qxp MEK platform at boot time when we use single LVDS to HDMI display. The workaround is to read the cable detection status for even more times. Based on experiments, it looks reading for 90 times works. Signed-off-by: Liu Ying <victor.liu@nxp.com>
Liu YingLiu Ying
cd0198b8bebMLK-16207-1 drm/bridge: it6263: Add gpio reset support A low pulse whose width is at least 40ms on pin SYSRSTN may reset the bridge, according to the chip maker. This patch adds gpio reset support for the bridge. Signed-off-by: Liu Ying <victor.liu@nxp.com>
Yuchou GanYuchou Gan
2c488aedd49MGS-3093 [#imx-701] Fix power-off random failure when GPU become idle Workaround to fix this issue, gpu failed to power off because chip is not idle when tried to cut the power, tried and wait until gpu is idle and then tried to power off will help. Date: Aug 15, 2017 Signed-off-by: Yuchou Gan <yuchou.gan@nxp.com>
Fancy FangFancy Fang
9f9e3dc4714MLK-16197-13 video: fbdev: dcss: workaround to make fifo commit to be synchronous Add a workaround to make the fifo commit operation to be synchronous, since for now, there is no interface which can be called by user space to do synchronization. Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy FangFancy Fang
d9e8ea72a7dMLK-16197-12 video: fbdev: dcss: refine 'dtg_channel_timing_config' Add 'blank' parameter to 'dtg_channel_timing_config' interface to set or clear the channel display window according to the blank state. Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy FangFancy Fang
901a3dc349fMLK-16197-11 video: fbdev: dcss: remove (un)blank calls in 'dcss_set_par' Remove the possible 'dcss_blank' calls in 'dcss_set_par', since the context loader can change the DCSS sub-modules configuration on the fly. Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy FangFancy Fang
d173165c923MLK-16197-10 video: fbdev: dcss: improve 'dcss_blank' logic Do the following improvements about 'dcss_blank': 1. move DPR trigger on config from 'dcss_blank' to 'dcss_dpr_config'. 2. move SCALER trigger on config from 'dcss_blank' to 'dcss_scaler_config'. 3. remove duplicate code in 'dcss_blank'. 4. save the blank state for each channel in 'dcss_blank'. All the above improvements focus on making fb blank/unblank logic more simple and more clear. Signed-off-by...
Fancy FangFancy Fang
7874e985061MLK-16197-9 video: fbdev: dcss: improve dtg config logic Do the following improvements about DTG config: 1. move db and sb loading position config from 'dcss_dtg_config' to 'dcss_dtg_start'. 2. Only one DTG trigger config is required which is put in 'dcss_dtg_start'. 3. move 'dcss_dtg_config' call from 'dcss_blank' to 'dcss_set_par'. 4. add default background color configs for both graph and video layers in 'dcss_dtg_start'. 5. remove channel ...
Fancy FangFancy Fang
1f6169fd964MLK-16197-8 video: fbdev: dcss: move subsam config to probe Move the SUBSAM config to probe stage to generate display timings as soon as the graphic layer unblank. Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy FangFancy Fang
274dcfc456dMLK-16197-7 video: fbdev: dcss: use display mode for subsam config The SUBSAM module is used to generate the output timings to display monitor. So use display mode to config SUBSAM is more suitable and can reduce coupling degree between SUBSAM config and graphic layer initialization. Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy FangFancy Fang
1952ac20ebdMLK-16197-6 video: fbdev: dcss: move 'dcss_dtg_start' call to probe Move the 'dcss_dtg_start' calling to probe stage which can service the fifo commits generated in probe stage in time. Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy FangFancy Fang
3b45a2a957fMLK-16197-5 video: fbdev: dcss: use display mode for 1st frame dtg config For the first frame timings generated by DTG, the display mode is better to be used to configure this timings which can reduce the coupling degree between first frame dtg config and the graphic layer initialization process. Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy FangFancy Fang
83f236d0f3aMLK-16197-4 video: fbdev: dcss: improve hp/lp data count settings For now, all the DCSS register configuration should be put in the high priority single buffer by default in context loader. So improve the high and low priority data counts calculation and setting. Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy FangFancy Fang
de5f9340f8dMLK-16197-3 video: fbdev: dcss: add fifo commit in dcss_set_par(). In dcss_set_par(), it will config the parameters related with DEC400D/DTRC, DPR, SCALER, HDR10 and etc. So commit all the registers configuration at the end of this function to avoid mixing with later configurations which may cause duplicating settings in one commit. Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy FangFancy Fang
462e2867d6aMLK-16197-2 video: fbdev: dcss: init dcss irqs earlier Initialize the DCSS interrupt system earlier to make it enabled before any cfifo commit. Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy FangFancy Fang
cf3ac408d23MLK-16197-1 video: fbdev: dcss: use non-cacheable mapping for cfifo buffer. The kernel direct mapping for cfifo buffer is cacheable which requires cache flush and is easier to bring in strange issue. So use coherent dma mapping for cfifo buffer access. But the kfifo dma sgl interface using the direct mapping to get the phyiscal page via dma mapping virtual addr. So record fifo 'in' for each commit which is used for context loader sb and db addr configurations. Signed-off-by: Fancy Fang <che...
Robby CaiRobby Cai
8228820939aMLK-14720 epdc: correct WFE setting when bypass legacy process set WFE (WFE_A on imx7d, and WFE_B on imx6ull/imx6sll) input address to framebuffer start address, and set left/top coordinate since the framebuffer is the original source of WFE (i.e., not from PXP output) when bypass legacy mode. The patch also limits the condition to bypass legacy mode when not use EPDC_FLAG_USE_ALT_BUFFER. Signed-off-by: Robby Cai <robby.cai@nxp.com> (cherry picked from commit 7f19940705902623166777c675f5e10...
Richard ZhuRichard Zhu
3251debd10cMLK-16176-2 PCI: imx: get the bus clock regulator correctly In order to make sure that get the regulator correctly. Check the return value of devm_regulator_get(). Return value directly if it is '-EPROBE_DEFER' Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Richard ZhuRichard Zhu
63fa190e7a7MLK-16176-1 ARM: dts: imx6qp: remove the duplicated node The pcie dts node is dulicated, remove none-used one. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Fugang DuanFugang Duan
7ad58d6da28MLK-16200 arm64: dts: imx8qxp-mek: enable UART port for Bluetooth 1FD and 1CQ Enable lpuart port1 for Bluetooth HCI interface, tested pass on Murata module 1FD and 1CQ on imx8qxp MEK board. Signed-off-by: Fugang Duan <fugang.duan@nxp.com> Reviewed-by: Pandy Gao <pandy.gao@nxp.com>
Fugang DuanFugang Duan
7622a14e7fdMLK-16199 tty: serial: lpuart: don't clear idle flag in eeop mode In DMA EEOP mode idle flag can trigger DMA major loop stop. The idle flag should be cleared by HW. So others cannot clear idle flag in the mode enabled. Signed-off-by: Fugang Duan <fugang.duan@nxp.com> Reviewed-by: Pandy Gao <pandy.gao@nxp.com>
Zhou Peng-B04994Zhou Peng-B04994
940c5a85dbcMLK-16196: [i.MX8MQ/Hantro]: enhance power management for suspend/resume Add operations to reset control block registers in resume functions, otherwise system will crash Signed-off-by: Zhou Peng-B04994 <eagle.zhou@nxp.com> Reviewed-by: Bai Ping <ping.bai@nxp.com>
Adriana ReusAdriana Reus
b824d2a0987MLK-16172: dts: imx8qm: Add pwm entries Add entries for imx8qm pwms. DT settings were tested on zebu. Signed-off-by: Adriana Reus <adriana.reus@nxp.com>
Anson HuangAnson Huang
bfecbf78b0cMLK-16201 arm64: dts: freescale: imx8mq: add dcss and hdmi power domain On i.MX8MQ, DCSS and HDMI are in display mix power domain, assgin them to display mix power domain. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Peter ChenPeter Chen
cb3892a9deeusb: core: hub: controller driver name may be NULL The controller driver may be NULL if the controller device is the middle device between platform device and roothub. This middle device may not need a device driver due to all hardware control can be at platform device driver, this platform device is usually a dual-role USB controller device. The benefit of using this middle device is we can keep both controller device's private data (known as struct usb_hcd) for USB core use, and platform ...
Peter ChenPeter Chen
82f1682898eusb: chipidea: core: do not register extcon notifier if extcon device is not existed This issue is detected when the system has another device driver which registers USB connector extcon device, fix it by adding extcon device check. Signed-off-by: Peter Chen <peter.chen@kernel.org> Signed-off-by: Peter Chen <peter.chen@nxp.com>
Bai PingBai Ping
46d6d4c5076MLK-16194 ARM64: defconfig: enable pm test config by default for imx8 Enable PM debug config in default config for imx8 SOC. Signed-off-by: Bai Ping <ping.bai@nxp.com>
Gao PanGao Pan
8431f5839a4MLK-16189 arm64: dts: enable i2c bus expander for imx8qxp-mek enable i2c bus expander for imx8qxp-mek Signed-off-by: Gao Pan <pandy.gao@nxp.com>
Gao PanGao Pan
6d8f914a115MLK-16191 arm: dts: add i2c bus recovery for imx6qp-sdb board Add i2c bus recovery support to recover i2c2 bus from dead lock status. Signed-off-by: Gao Pan <pandy.gao@nxp.com>
Bjorn AnderssonBjorn Andersson
e58c05fd254rpmsg: Introduce a driver override mechanism Similar to other subsystems it's useful to provide a mechanism to force a specific driver match on a device, so introduce this. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Henri RoosenHenri Roosen
4ed91149aa0rpmsg: cleanup incorrect function in dev_err message Trivial cleanup for incorrect function in dev_err message Signed-off-by: Henri Roosen <henri.roosen@ginzinger.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Dan CarpenterDan Carpenter
dc021021176rpmsg: unlock on error in rpmsg_eptdev_read() We should unlock before returning if skb_dequeue() returns a NULL. Fixes: c0cdc19f84a4 ("rpmsg: Driver for user space endpoint interface") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Bjorn AnderssonBjorn Andersson
9c5a0007982rpmsg: Driver for user space endpoint interface This driver allows rpmsg instances to expose access to rpmsg endpoints to user space processes. It provides a control interface, allowing userspace to export endpoints and an endpoint interface for each exposed endpoint. The implementation is based on prior art by Texas Instrument, Google, PetaLogix and was derived from a FreeRTOS performance statistics driver written by Michal Simek. The control interface provides a "create endpoint" ioctl, ...
Sandor YuSandor Yu
03f7a670846MLK-16184: hdmi: Add timeout check to hdmi initialize Add timeout check for hdmi FW alive function to avoid kernel booting hang for that board without HDMI FW. CDN_API_General_Test_Echo_Ext_blocking is the first function that calling mailbox. Add timeout to the function to avoid kernel booting hang for that board without HDMI ROM patch. Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Viorel SumanViorel Suman
4193f4b9efbMLK-13975: ASoC: fsl: amix: remove primary SAI power on/off The intention of currently implemented primary SAI power-on/off on BE startup/shutdown was to make sure the primary SAI is powered-on when the playback is started on the secondary SAI. However in a such scenario the primary SAI is powered-on when the primary SAI output is recorded. Signed-off-by: Viorel Suman <viorel.suman@nxp.com> Reviewed-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Viorel SumanViorel Suman
ce1544a7e67MLK-13975: ASoC: fsl: Assign audio clocks within it's own power domain In order to leverage the power domain clocks rate store/restore functionality all clocks used by device must be specified within the device specific power domain. Signed-off-by: Viorel Suman <viorel.suman@nxp.com> Reviewed-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Zhou Peng-B04994Zhou Peng-B04994
2db5b9dc415MLK-16171: [i.MX8MQ/Hantro]: Refine coding style of hantro driver Remove error reported by Linux coding style script Remove unnecessary macro: MULTI_CORE,CLK_CFG,VSI Remove unnecessary variables: base_port,elements,irq_x,mmp_timer_xxx Signed-off-by: Zhou Peng-B04994 <eagle.zhou@nxp.com>
Mihai SerbanMihai Serban
e4f0af5f78cMLK-16177: soc: imx: Fix resources release in pm-domains detach_dev function Because of a typo the resources allocated in imx8_attach_dev were not correctly released by imx8_detach_dev. Fixes: a0fb334819bb ("MLK16147-2 soc:imx Add support to save/restore clock rates") Signed-off-by: Mihai Serban <mihai.serban@nxp.com> Reviewed-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>
Han XuHan Xu
a6d3c4f0128MLK-16150: arm64: config: enable JFFS2 in defconfig enable JFFS2 support in default configuration Signed-off-by: Han Xu <han.xu@nxp.com>