MGS-3800 drm,imx: drop drm_of_component_probe() in favor of imx specifics.
In order to be able to specify a comparison based on driver name.
This is due to the fact that we don't have a dts/dtb entry for the
blit engine and we rely only on the driver name.
Not present in previous patches.
Signed-off-by: Adrian Negreanu <adrian.negreanu@nxp.com>
Signed-off-by: Meng Mingming <mingming.meng@nxp.com>
Signed-off-by: Marius Vlad <marius-cristian.vlad@nxp.com>
MLK-15321 drm,imx: Add DRM support for dpu-blit
This patch adds DRM support for the blit engine, allowing
DRM_RENDER_ALLOW ioctls() to be registered dynamically.
Signed-off-by: Adrian Negreanu <adrian.negreanu@nxp.com>
Signed-off-by: Marius Vlad <marius-cristian.vlad@nxp.com>
Signed-off-by: Meng Mingming <mingming.meng@nxp.com>
---
Changes since v3:
Added support for registering DRM_RENDER ioctls dynamically, by replacing fops
ioctl to a routed one (provided by drm core), where we get the ...
MLK-15321 dpu: Register the blit engine(s).
Signed-off-by: Marius-Adrian Negreanu <adrian.negreanu@nxp.com>
Signed-off-by: Meng Mingming <mingming.meng@nxp.com>
Signed-off-by: Marius Vlad <marius-cristian.vlad@nxp.com>
---
Changes since v3:
Use a features array for bliteng driver name, as not to polute
dpu_add_client_devices() and simply the register process in the same time.
MLK-16227: arm64: dts: fsl-imx8qm-lpddr4-arm2: Introduce it6263 dual chan dts
This patch adds support for dual lvds channels for the it6263 LVDS to HDMI
bridge for fsl-imx8qm-lpddr4-arm2 board. LVDS Dual channel mode is supported on the
the MCIMX8-HDMIDC board. LVDS Dual channel mode is not supported on the mini SAS LVDS
to HDMI daughter card.
Signed-off-by: Oliver Brown <oliver.brown@nxp.com>
MLK-16243: mtd: gpmi: enable the EDO mode for i.MX8
Enable the EDO mode on i.MX8 platforms for better performance.
Signed-off-by: Han Xu <han.xu@nxp.com>
MLK-16242-7 video: fbdev: dcss: add non-blocking mode in pan display
Add non-blocking mode for pan display interface to
support very special cases to focus on the maximum
FPS display.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
MLK-16242-6 video: fbdev: dcss: refine cfifo synchronization logic
Remove the synchronization workaround in 'commit_to_fifo()'
and add ctxld wq flush calls in pan display, since the pan
display usually requires blocking mode behavior. But other
functions can also work in non-blocking mode, so perform
synchronization handling in 'commit_to_fifo' is not good
for the interfaces which doesn't require blocking mode.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
MLK-16242-5 video: fbdev: dcss: add 'FBIO_WAITFORVSYNC' support
Implement 'FBIO_WAITFORVSYNC' ioctl which is a non-standard
command to provide vsyc active wait function for user space
applications.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
MLK-16242-3 video: fbdev: dcss: add dtg irq handling
Add the 8th interrupt of DCSS handling for DTG
which is used to trigger the signal when the VSYNC
start point reaches. By default, this irq is masked
to avoid too many unnecessary interrupt handles.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
MLK-16242-2 video: fbdev: dcss: correct some irq indexes
The hw irq index for DEC400D, DTRC2 and DTRC3 should
be '15', '16' and '17'. So correct the corresponding
macro definitions in DCSS driver.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
MLK-16242-1 ARM64: dts: imx8mq: add the 8th irq for DCSS
The 8th interrupt of DCSS comes from DTG module
and it is used as a general purpose timings
interrupt which can generate an interrupt at a
programmable X/Y corordinate. There are total
four such interrupts in DTG. And this one will
be used for a VSYNC Active interrupt.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
MLK-16240 drm/bridge: it6263: Don't use freed edid structure in ->get_modes()
We call the helper drm_detect_hdmi_monitor() to check if the EDID blob read
from a monitor indicates the monitor is connected via HDMI or not. We pass
an edid structure to the helper. However, the structure has been freed
before we use it. This patch moves the helper up before the structure is
freed to fix the issue.
Fixes: a5c01aa91842 ("MLK-15001-25 drm/bridge: Add ITE IT6263 LVDS to HDMI transmitter support"...
MLK-12606 ARM64: defconfig: Enable USB host CDC ACM
Build USB host cdc acm driver as module.
Acked-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
MLK-16013-41 ARM64: imx8mq: remove dis_u2_susphy_quirk for usb
As the USB3 hotplug issue identified by IC team, the recommended
solution is to use FREECLK by clear COMMMONONN, so remove this
quick temp workaround.
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
MLK-16013-40 phy: phy-fsl-imx8mq-usb: clear COMMONONN to keep FREECLK running
COMMONONN: This signal controls whether the high-speed Bias and PLL
blocks remain powered—consuming additional current during Suspend and
Sleep modes. As imx8mq USB3 ITP&SOF have to use FREECLK, so clear
COMMONONN to be 0(valid) to make FREECLK always running, this is the
recommended setting from design team.
Acked-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
MLK-16013-39 ARM64: defconfig: enable typec and power delivery
Build-in typec, power delivery port manager and tcpci driver.
Acked-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
ASoC: codecs: fsl_mqs: Add PM support
Save the values of registers at suspend and restore
it at resume.
We don't need to implement runtime PM support because
MQS is already enabled in startup() and disabled in
shutdown().
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
MLK-16239 clk: imx: imx8qm/qxp: Adding the missing sentinel value of match table
Need to put the sentinel value to the end of the of_device_id array.
This patch also fixes the following KASAN complains when KASAN is enabled:
[ 0.671315] ==================================================================
[ 0.678400] BUG: KASAN: global-out-of-bounds in __of_match_node+0x70/0xb8 at addr ffff2000092958a8
[ 0.687321] Read of size 1 by task swapper/0/1
[ 0.691760] Address belongs to va...
MLK-16196-2: [i.MX8MQ/Hantro]: enhance power management for suspend/resume
in resume functions, vpu clock maybe not enabled at all,
so clk enable/disable are required by hw related operations in resume context
Signed-off-by: Zhou Peng-B04994 <eagle.zhou@nxp.com>
Reviewed-by: Bai Ping <ping.bai@nxp.com>
MLK-16222-2 video: fbdev: dcss: use new coeffs from tables
The new coeff tables defined in 'imx_dcss_table.h' can
make common alpha blending operations to be correct.
So config the corresponding registers with these new
coeffs in the probe stage with only once and remove
the previous duplicate configurations. Besides, one
dtg config needs to be adjusted accordingly.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
MLK-16222-1 video: fbdev: dcss: define some tables in a header file
Define some data tables to list all the coefficients config
which only requires to be configured once. The tables include:
1. Scaler Coeffs
2. HDR10 Input Pipe LUT and CSC Coeffs
3. HDR10 Output Pipe Linear to Non_Linear Conversion
and CSC Coeffs.
Each table entry includes the register offset addr and the
value needs to be written to this register.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
MLK-16215 PCI: imx: refine pcie codes
- correct the msi address
- only do shutdown reset for imx6q pcie, since only
imx6qdl pcie doesn't have the reset mechanism.
- don't limit the max link speed of imx pcie to gen2
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
MLK-16226: arm64: dts: disable the NAND node in i.MX8QXP default device tree
NAND node was disabled in default device tree, the patch 4ad48e3cf
wrongly inserted usb node in the middle caused NAND enabled.
Signed-off-by: Han Xu <han.xu@nxp.com>
MLK-16203 enable runtime pm of i2c temporary when do system suspend
When we do system suspend, the runtime pm will be disabled, but we need
to control the PMIC to power on/off the regulator, if the runtime pm is
disabled, if will failed to request runtime wakeup. So data transfer will
failed.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Signed-off-by: Gao Pan <pandy.gao@nxp.com>
MLK-13975-2: ASoC: fsl: qxp: Make AMIX working for 8 channels and 96kHz rate
The patch mirrors commit 7c953daaf599 ("MLK-13975: ASoC: fsl: Make
AMIX working for 8 channels and 96kHz rate") for QXP.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
MLK-13975-1: ASoC: fsl: qxp: Assign audio clocks within it's own power domain
The patch mirrors commit f154ceffe411 ("MLK-13975: ASoC: fsl: Assign audio
clocks within it's own power domain") for QXP.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
MLK-16217: PXP: fix pxp rotate yuv formate video issue
Because of IC limitation, pxp only can use rotation0 engine to
do rotation operation.
Correct coordinate settings of ps and out buffer.
Signed-off-by: Guoniu.Zhou <guoniu.zhou@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
Reviewed-by: Fancy Fang <chen.fang@nxp.com>
MLK-13975: ASoC: fsl: Make AMIX working for 8 channels and 96kHz rate
Double the master and related clocks frequencies for AMIX SAIs in order to
make AMIX working for 8 channels and 96k Hz rate.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
MLK-16065-16 usb: cdns3: gadget: fix no one handled interrupt issue
If there are too many interrupts for non-control ep, the
no-one handled interrupt issue will occur due to without
return IRQ_HANDLED for them.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
MLK-16065-14 ARM64: dts: fsl-imx8qm-lpddr4-arm2.dts: add USB Type-C port support
Due to pin conflict with other modules, we can only enable
host mode for Type-C port. If the user wants to use both
host and device mode for Type-C port, please use
fsl-imx8qm-lpddr4-arm2-usb3.dts instead.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
MLK-16065-13 ARM64: defconfig: add USB testing driver and USB2 comliance client driver
Add USB testing driver and USB2 comliance client driver (used for
USB2 test in USB3 IP).
Signed-off-by: Peter Chen <peter.chen@nxp.com>
MLK-16065-12 ARM64: defconfig: add EXTCON_PTN5150 support
It is a Type-C CC logic chip, the USB driver will get external events
for detach and attach for kinds of Type-C cables.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
MLK-16065-11 ARM64: defconfig: enable cadence USB3
Enable both USB host and device function for Cadence USB3 IP.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
MLK-16065-10 usb: host: xhci-dbg: do not print reseverd registers for imx cdns host
When access reserved registers, the cdns host will trigger
an exception, and the synchronous external abort will occur
at ARM64 platforms.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
MLK-16065-8 usb: host: xhci: add XHCI_SKIP_ACCESS_RESERVED_REG quirk
The IMX XHCI host which uses cadence USB3 IP is not compatible with
xHCI spec, the controller will trigger an exception if
visiting reserved registers, but the xHCI spec does not forbid it,
so add one quirk for skipping access reserved registers.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
MLK-16065-7 usb: cdns3: add Cadence USB3 controller driver
Add Cadence USB3 IP driver, this is the 1st version for this driver,
so wrapper layer and PHY layer are still IP core file (core.c).
Below functions are supported:
- Basic host function
- Limited gadget function, only ACM (old g_seiral) are supported, and
mass_storage support is not very well.
- Role switch between host and device through extcon design
(Eg, Type-C application NXP PTN5150).
Below functions are missing:
- Multi-queue...
MLK-16065-5 extcon: ptn5150: add PTN5150 Type-C CC logic chip
Add NXP PTN5150 Type-C CC logic chip, this chip supplies CC flip
function automatically, and the driver will notify extcon
consumer (USB controller driver) attach and detach events.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
MLK-16065-4 ARM64: dts: fsl-imx8qm: add fsl-imx8qm-lpddr4-arm2-usb3.dts
This dts is dedicated for USB3 Type-C port, the Type-C CC logic
chip PTN5150 is conflict with other peripherals which use
i2c1 pins (I2C1_SDA/I2C1_SCL) from GTP blocks.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
MLK-16065-3 ARM64: dts: fsl-imx8qxp-lpddr4-arm2.dts: enable USB3 Type-C port
At imx8qxp arm2 board, the USB3 controller is at one Type-C port, and
the CC logic at this Type-C port is controlled by PTN5150. Enable
USB3 Type-C port at this commit.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
MLK-16065-2 ARM64: dts: fsl-imx8qxp.dtsi: add Cadence USB3 support
Add Cadence USB3 controller and phy, the phy uses generic USB PHY
driver.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
MLK-16065-1 ARM64: dts: fsl-imx8qm.dtsi: add Cadence USB3 support
Add Cadence USB3 controller and phy, the phy uses generic USB PHY
driver.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
MLK-16202-03 ARM64: dts: add separate node for each domain on imx8mq
Use separate node for each domain, so we can easily handle the clock
and supply specific to each domain.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
MLK-16202-02 driver: soc: refact the gpc power domain driver for imx8mq
Enhance the power domain driver for i.mx8mq. We may need to make sure
clock is enabled for some power domain. And also when a power domain
is down, the external supply for this power domain need to be turn off
to save power.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
