MLK-16183 drm/bridge: it6263: Workaround cable detection failure at boot time
There is cable detection failure issue on i.MX8qxp arm2 platform
at boot time when we avoid imx-drm deferral probe entirely(i2c
bus driver probe needs to be before the it6263 driver probe).
The workaround is to read the cable detection status multiple
times. Based on experiments, it looks reading for 40 times works.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
MLK-16169 drm: Move imx-drm down after bridge in Makefile
We've got imx platforms which use bridges in imx-drm, e.g.,
the i.MX8qm and i.MX8qxp arm2 platforms use it6263 LVDS
to HDMI bridges in imx-drm. So, it would be straight
forward to put imx-drm down after bridge in Makefile to
avoid unnecessary deferral probe.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
MLK-16168 gpu: Move imx up before drm in Makefile
We register dpu and ipu-v3 crtc platform devices in dpu and ipu-v3
base drivers for imx-drm to use, so it would be straight forward to
put imx before drm in Makefile.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
MLK-16174: ASoC: fsl_hifi4: load firmware in device open phase.
Move the load firmware operation from probe function to open,
Then firmware can be loaded from rootfs.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
MLK-16179 arm64: dts: imx8qxp-mek: enable the bcmdhd pcie driver
Enable the driver to support the Murata 1FD (BCM89359).
Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com>
MLK-16163: WiFi: Fix compiler warning in bcmdhd driver
The mode the BUSTYPE macro is defined in
drivers/net/wireless/bcmdhd_1363/include/bcmdefs.h
will always trigger the below compiler warning when BCMBUSTYPE
is not defined.
Keep the comparison semantic but fix the warning by using a different
variable.
drivers/net/wireless/bcmdhd_1363/siutils.c: In function ‘si_doattach’:
drivers/net/wireless/bcmdhd_1363/siutils.c:520:14: warning:
self-comparison always evaluates to false [-Wtautologica...
MLK-16124 clk: imx: clk-gate-scu: Replace enable/disable with prepare/unprepare
enable/disable are not allowed to sleep.
For clk_gate3_scu these functions use calls into scfw that may sleep.
Move this functionality into prepare/unprepare to avoid that.
Patch also adds is_prepared callback.
Signed-off-by: Adriana Reus <adriana.reus@nxp.com>
MLK-16170 ARM64: dts: imx8mq-evk: disable MIPI DSI by default
The default display for IMX8MQ platform is 'DCSS-->HDMI',
so disable MIPI DSI by default on IMX8MQ.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
MLK-16162 video: fbdev: dcss: enable DPR and SCALER only in fb unblank
Place the DPR and SCALER enablement when unblanking one fb,
and they are only required to be enabled at the first time,
since the 'repeat_en' function will set the 'run_en' automatically
for subsequent frames.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
MLK-13975: ASoC: fsl: amix: Add channels and format constraints
Add channels and format constraints.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
MLK-16158-6 ARM64: dts: imx8mq-evk: set default display mode for adv7535 to 1080p60Hz
Set the default display mode for ADV7535 to 1920x1080p@60Hz which
is the maximum resolution can be supported by ADV7535.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
MLK-16158-5 video: fbdev: adv7535: refine low refresh settings
Use the 'refresh' in video mode to determine to set
low refresh config for adv7535 wheter or not.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
MLK-16158-4 ARM64: dts: imx8mq: change dsi phy pll 'max-data-rate' to 1.5GHz
Accoring to the PHY spec, the DSI PHY PLL on imx8mq platform
can support up to 1.5GHz data rate. So change the 'max-data-rate'
to 1.5GHz on imx8mq.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
MLK-16158-3 video: fbdev: mipi_dsi_northwest: add 'vmode_index' to help phy pll config
Add a field 'vmode_index' to 'mipi_dsi_info' structure to
save the display video mode derived from dts to help config
the PHY PLL as desired.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
MLK-16158-2 ARM64: dts: imx8mq-evk: add a new dts to support 'LCDIF-->DSI'
There are two independent display path on imx8mq platform:
a. DCSS --> HDMI
b. LCDIF --> DSI
The default enabled display path is 'DCSS-->HDMI', so add
a new dts to enable 'LCDIF-->DSI', and at the same time,
disable 'DCSS-->HDMI' path.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
MLK-16158-1 video: fbdev: dcss: refine ctxld enable code.
Refine the ctxld enable configuration by using the
'CTXLD_CTRL_STATUS_SET' to make the code more clean
and strong.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
MLK-16159: ASoC: imx_cdnhdmi: refine the N value selection
According the HDMI spec, the N value depends on the TMDS
rate, and sample rate. As we set the vic mode in dts file,
use the vic_table to get the TMDS rate, then choose the
proper N value.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Reviewed-by: Sandor Yu <sandor.yu@nxp.com>
MGS-3159 [#imx-700] fix kernel panic for x11 stress test
when gpu memory is from virtual system pool, the physical address
will become invalid, driver should enable mmu mapping accordingly.
but current kernel driver return the zero address with default value,
this mistake will cause gpu write into the wrong memory from zero.
this fix mark the invalid address for the virtual memory.
Date: Aug 06, 2017
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
Reviewed-by: Yuchou Gan <yuchou.gan@nxp.c...
MLK-16157: ARM64: dts: change the video mode for hdmi audio
change the video mode for hdmi audio according hdmi video device
node
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
MLK-16154: ASoC: fsl_asrc_m2m: fix crash issue with multi-instance
When open 2 instances of m2m, there is kernel dump. The reason is we
use the dev_set_drvdata to set drvdata for each instance, but each
instance share a same device, the result is drvdata will be changed
by other instances, then cause issue. so the dev_set_drvdata can't be
used, need to combine the pair data with file handler.
Fixes: 58ab1eb5b8c5 ("MLK-13945-3: ASoC: fsl_asrc: support two asrc
devices")
Signed-off-by: Sheng...
MLK16147-2 soc:imx Add support to save/restore clock rates
In iMX8QM/iMX8QXP the clock rates set in HW is lost when devices are
powered up/down as part of runtime-pm or suspend/resume.
Add support to the power domain driver to save/restore clock rates
associated with devices as part of power up/down.
Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>
MLK16147-1 clk:imx - Add support to get the clock rate
Add support to get the clock rate of a gate clock. This is required
to save/restore devices clocks when they are powered up/down.
Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>
MLK-16136-17 video: fbdev: dcss: clear global alpha in blanking one channel
The global alpha for one channel should be cleared when
blanding this channel.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
MLK-16136-15 video: fbdev: dcss: enable pan display function
Enable pan display function for dcss framebuffer driver.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
MLK-16136-14 video: fbdev: dcss: refine ctxld interrupts unmask logic
The ctxld interrupts are better to be unmasked during
interrupts initialization in probe stage with only once.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
MLK-16136-13 video: fbdev: dcss: add 'NV12' support for Video layer
Add 'NV12' format support for Video layer.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
MLK-16136-12 video: fbdev: dcss: refine scaler coefficients configuration
Use a better scaler coefficients array which can support
both RGB and YUV pixels correctly. And also refine the
coefficients setting code to make it more clear and more
compact.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
MLK-16136-11 ARM64: dts: imx8mq-evk: set default HDMI display mode to 1080p@60
Set the default HDMI display mode to '1080p@60Hz' instead of 4K,
since '1080p' is a more popular mode which can be supported by
almost every monitor or TV.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
MLK-16136-10 ARM64: dts: imx8mq-evk: enable HDMI display by default
The default display path on imx8mq-evk board is
'DCSS --> HDMI'. So enable the HDMI controller
by default.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
MLK-16136-9 irqchip: imx-irqsteer: adjust irq config via 'endian'.
Change the irq configurations with adding endianness
determination for different platforms which may choose
different kinds of endianess.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
MLK-16136-8 ARM64: dts: imx8mq: add 'endian' property for irqsteer
The relationship between an interrupt and its
register and bit offset has two possible cases:
.Littel Endian (LSB)
.Big Endian (MSB)
So add 'endian' property to help irqsteer kernel
driver to configure interrupts correctly.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
MLK-16136-7 irqchip: imx-irqsteer: correct registers macro defitions
Correct several macro definitions related with irqsteer
to avoid incorrect expression calculation due to operators
priority.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
MLK-16136-6 video: fbdev: DCSS: enable DCSS driver.
This is the initial DCSS driver code which supports:
1. Two DCSS channels: HDR10 Graphic and HDR10 Video.
2. Context Loader to surppot on-the-fly module config.
3. Support ARGB8888 format for input and output.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
MLK-16136-5 ARM64: dts: imx8mq-evk: enable DCSS by default.
The default display path on imx8mq-evk should be
DCSS --> HDMI. So enable DCSS by default on imx8mq-evk
board.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
MLK-16136-4 ARM64: dts: imx8mq-evk: disable LCDIF by default.
Disable LCDIF by default and DCSS will be the default
display controller on imx8mq-evk board.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
MLK-16136-2 ARM64: dts: imx8mq: add irqsteer node.
The DCSS interrupts go to GIC via irqsteer module.
So add this device node on imx8mq board.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
MLK-16136-1 clk: imx: imx8mq: define DCSS root clocks.
Define three root clocks for DCSS module:
.IMX8MQ_CLK_DISP_AXI_ROOT
.IMX8MQ_CLK_DISP_APB_ROOT
.IMX8MQ_CLK_DISP_RTRM_ROOT
These root clocks share one clock gate along with
'IMX8MQ_CLK_DISP_ROOT' clock. So change its type
to be shared gate clock too.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
MLK-16149 arm64: dts: imx8qm/qxp: Remove memory reserve entry for M4 and ATF
Since u-boot will process the owned memory in current partition and modify
the DTB memory nodes for kernel at runtime, no need to set the first 128MB memory
as "memreserve" in DTS.
ATF: 0x80000000 -- 0x801fffff.
- This area will be cleaned out of available memory by u-boot.
M4: 0x88000000 -- 0x8fffffff.
- A memory reserve entry will be added to DTB by u-boot.
Signed-off-by: Ye Li <ye.li@nxp.com>
MLK-16126 arm64: dts: imx8qm: Fix pd_sata0 node's name
Should use PD_HSIO_SATA_0 not the PD_HSIO_SATA0 to align with imx8_pd.h.
Signed-off-by: Ye Li <ye.li@nxp.com>
MLK16091-1 clks:imx8qx - Add VPU encoder and decoder clocks
VPU encoder and decoder clocks can be enabled/disabled by
Linux on iMX8QX.
Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>
