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AuthorCommitMessageCommit Date
Robin GongRobin Gong
1254d6d9229MLK-16704-1: watchdog: imx8_wdt: add watchdog driver for i.mx8QM/QXP This watchdog driver is a virtual driver in Linux and call ATF interface where call SCFW eventually. In SCFW, it's done by SCU timer tick instead of hardware watchdog.This is why we have to call ATF because such system resource owned by secure patition.Currently, booard reset happen if not ping this software watchdog in time in linux side, may change to partition reboot once SCFW support this feature in the future. BuildIn...
Frank LiFrank Li
e955e6010e5MLK-16701 JPEG: add rum time pm support Support run time pm Signed-off-by: Frank Li <Frank.Li@nxp.com> Acked-by: Sandor Yu <sandor.yu@nxp.com>
Anson HuangAnson Huang
f2e13ff14a1MLK-16710 cpufreq: imx8mq: avoid duplicated OPP table initialization On i.MX8MQ, since the OPP table is initialized in cpu-freq platform device register according to chip type, so no need to redo the OPP table initialization in cpu-freq driver, this patch adds check for OPP table initialization to avoid below warning during boot up: [ 1.468378] cpu cpu0: _opp_add: duplicate OPPs detected. Existing: freq: 1501 [ 1.468388] cpu cpu0: _opp_add: duplicate OPPs detected. Existing: freq: 130...
Anson HuangAnson Huang
f2e2203c087MLK-16705-3 ARM64: dts: freescale: imx8qxp: add resource wakeup support Add wakeup unit to support resource wakeup management on i.MX8QXP, also enable wakeup function for LPUARTx and FLEXCANx. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Bai Ping <ping.bai@nxp.com>
Anson HuangAnson Huang
b9305b2823aMLK-16705-2 ARM64: dts: freescale: imx8qm: add resource wakeup support Add wakeup unit to support resource wakeup management on i.MX8QM, also enable wakeup function for LPUARTx and FLEXCANx. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Bai Ping <ping.bai@nxp.com>
Anson HuangAnson Huang
684ce84b51aMLK-16705-1 soc: imx: pm-domains: add wakeup unit irqchip to manage wakeup source For a resource enabled as wakeup source, its power needs to be kept on during suspend, this is required by SCFW to support wakeup ability for a resource. This patch adds a virtual wakeup unit to support this function, wakeup unit is registered as a irqchip being a child of GIC, if a resource can be enabled as a wakeup source, needs to pass its irq number in device tree power domain node using "wakeup-irq = <x>...
Bai PingBai Ping
9f3d0e9fd2dMLK-16708 clk: imx: change the nand_usdhc_bus clock's source Change NAND_USDHC_BUS clock's source to SYS PLL1 266M. Signed-off-by: Bai Ping <ping.bai@nxp.com>
Ye LiYe Li
fc7cfc56c25MLK-16709 dts: imx8qm: Disable the UART2 on MEK base board CM4_1 core will use the UART2 on QM MEK base board as its console. Since this port currently is a backup debug port on A core side, not really used. We disable it in dts to yield the port for CM4_1. Signed-off-by: Ye Li <ye.li@nxp.com> Acked-by: Fugang Duan <fugang.duan@nxp.com>
Oliver BrownOliver Brown
def82d80ec7MLK-16702 soc:imx8qm/qxp Adding additional frequencies Adding defines for 864 MHz and 432 MHz from the following commits: " commit 655ed33f3b2e158ea92ab96c3999a5bd73791d76 Author: Oliver Brown <oliver.brown@nxp.com> Date: Thu Oct 26 11:49:49 2017 -0500 MIPI DSI V2: Adding define for 432 MHz. " " commit 88456c73b3c1ffde496622f2e66614a46a073410 Author: Oliver Brown <oliver.brown@nxp.com> Date: Tue Oct 17 10:53:58 2017 -0500 MIPI DSI: change the fixed clocks to allow for a 27MHz PHY...
Shengjiu WangShengjiu Wang
4c5e6b0221aMLK-16694-2: ARM64: dts: fix assigned-clocks for audio device node Even the clock is not used by current device, but it is used by other devices, it also need to be included in the assigned-clocks list. For in kernel side, clock rate is stored, but in scfw the clock rate is cleared when power off, this mismatch cause the parent rate is not set in next device, then children clock rate is wrong. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
Shengjiu WangShengjiu Wang
58065e1963eMLK-16694-1: ASoC: wm8960: add pm runtime for wm8960 As in imx8 mek board, the codec's mclk is from the audio subsystem, the subsystem's power domain should be disabled when subsystem is idle. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
Peter ChenPeter Chen
cb687d8a209MLK-16590 ARM64: dts: fsl-imx8qxp-mek: enable USB3 and PTN5110 All imx8qxp mek board will replace NTB0104 with NTS0104, so it is ok to enable PTN5110 and USB3 by default, see below commit for detail: commit 5989fe321b3026 ("MLK-16522-4 ARM64: dts: fsl-imx8qxp-mek: add USB3 support") BuildInfo: - SCFW 1f59442e, IMX-MKIMAGE fb52c576, ATF - U-Boot 2017.03-imx_v2017.03+g34be5a2 Acked-by: Li Jun <jun.li@nxp.com> Signed-off-by: Peter Chen <peter.chen@nxp.com>
Weiguang KongWeiguang Kong
e36ba2ab9dbMLK-16678-2: ASoC: fsl_hifi4: move hifi4 firmware to SDRAM move hifi4 dsp firmware's code and data section to SDRAM space move hifi4 dsp codec lib's code section to SDRAM space Signed-off-by: Weiguang Kong <weiguang.kong@nxp.com>
Weiguang KongWeiguang Kong
f309f0687f0MLK-16678-1: arm64: dts: distribute reserved memory for hifi4 dsp in SDRAM Because the OCRAM memory size for hifi4 dsp is too small to keep its code and data section, so distribute one reserved memory for hifi4 dsp to save its code and data section in SDRAM, the address space that hifi4 can access in SDRAM is 0x81000000 - 0x9FFFFFFF, so the reserved memory is as following: hifi4_reserved: hifi4@0x8e000000 { no-map; reg = <0 0x8e000000 0 0x1ffffff>; }; Signed-off-by: Weig...
Weiguang KongWeiguang Kong
97870218c28MLK-16691: ASoC: fsl_hifi4: unlock mutex before return error When error occurs in fsl_hifi4_open() function, before this function exists, "hifi4_priv->hifi4_mutex" should be unlocked. If not, when the device is opened next time, the kernel will be hanged. Signed-off-by: Weiguang Kong <weiguang.kong@nxp.com>
Jason LiuJason Liu
9898037b7b8MLK-16688 driver: media: mxc_jpeg: Remove the unused function to kill the build warnnings The patch fixes the following build warnnings by removing unused function: drivers/media/platform/imx8/mxc-jpeg.c:228:13: warning: ‘print_output’ defined but not used [-Wunused-function] static void print_output(void *addr) ^~~~~~~~~~~~ This patch also does the minor clean up by removing some commented-out code Signed-off-by: Jason Liu <jason.hui.liu@nxp.com> Acked-by: Fugang Duan <fuga...
Richard ZhuRichard Zhu
7be8e3fc87bMLK-16684-3 ata: imx: enable imx8qm sata enable sata on imx8qm. sata function is relied on the usage of pcie ports. BuildInfo: - SCFW 9559d5ec, IMX-MKIMAGE 06bc2767, ATF - U-Boot 2017.03-imx_v2017.03_4.9.51_imx8_beta1+g6dc7b0f Reviewed-by: Frank Li <frank.li@nxp.com> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Richard ZhuRichard Zhu
f7340e23349MLK-16684-2 clk: imx: correct the pd of the sata phy pclk Correct the pd of the sata phy pclk. BuildInfo: - SCFW 9559d5ec, IMX-MKIMAGE 06bc2767, ATF - U-Boot 2017.03-imx_v2017.03_4.9.51_imx8_beta1+g6dc7b0f Reviewed-by: Frank Li <frank.li@nxp.com> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Richard ZhuRichard Zhu
37437d2dba0MLK-16684-1 ARM: dts: enable imx8qm sata - enable imx8qm sata. - correct sata power supply. - sata clks: satahost_clk hsio_lpcg_sata phyx1_pclk phyx1_lpcg phyx1_epcs_tx_clk phyx1_lpcg hyx1_epcs_rx_clk phyx1_lpcg phyx2_pclk0 phyx2_lpcg phyx2_pclk1 phyx2_lpcg BuildInfo: - SCFW 9559d5ec, IMX-MKIMAGE 06bc2767, ATF - U-Boot 2017.03-imx_v2017.03_4.9.51_imx8_beta1+g6dc7b0f Reviewed-by: Frank Li <frank.li@nxp.com> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Frank LiFrank Li
9c4ba67ad2cMLK-16645-4 JPEG: Encode: fix wrong use dma descriptor address Signed-off-by: Frank Li <Frank.Li@nxp.com> Acked-by: Sandor Yu <sandor.yu@nxp.com>
Frank LiFrank Li
29b0eb72ce2MLK-16645-3 JPEG: fixed crash caused by call dma_free_coherence in irq move dma_free_coherence function to buf_cleanup Signed-off-by: Frank Li <Frank.Li@nxp.com> Acked-by: Sandor Yu <sandor.yu@nxp.com>
Frank LiFrank Li
c36f063af1cMLK-16645-2: dts: qxp: Enable JPEG encode/decode IP Signed-off-by: Frank Li <Frank.Li@nxp.com> Acked-by: Sandor Yu <sandor.yu@nxp.com>
Frank LiFrank Li
73c1a6e441bMLK-16645-1: clk: mx8qxp: correct JPEG clock source Signed-off-by: Frank Li <Frank.Li@nxp.com> Acked-by: Sandor Yu <sandor.yu@nxp.com>
Viorel SumanViorel Suman
354b81700e9MLK-13946-8: ASoC: fsl_sai: use min(channels,slots) for xMR setting xMR setting must be set as min(channels,slots) since both "channels < slots" and "channels > slots" scenarios are possible. Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Anson HuangAnson Huang
b961782540aMLK-16690 ARM64: dts: freescale: imx8qm: update A53 cpu-freq table SCFW removes A53 1.26GHz cpu-freq set-point, update it for linux kernel cpu-freq driver accordingly. SCFW patch: (674c078 Fix CPU frequency related issues) Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Zhou Peng-B04994Zhou Peng-B04994
b26d43d349eMLK-16671-5 - [i.MX8QXP/Malone]: Add vpu malone decoder driver Change statement from LGPL to GPL for malone header files Signed-off-by: Zhou Peng-B04994 <eagle.zhou@nxp.com>
Zhou Peng-B04994Zhou Peng-B04994
161ab119112MLK-16671-4 - [i.MX8QXP/Malone]: Add vpu malone decoder driver Only build malone for ARCH_MXC_ARM64 Signed-off-by: Zhou Peng-B04994 <eagle.zhou@nxp.com>
Zhou Peng-B04994Zhou Peng-B04994
eacbad63817MLK-16671-3 - [i.MX8QXP/Malone]: Add vpu malone decoder driver Refine makefile to fix yocto build issue: Remove redundant space after -D and -I Signed-off-by: Zhou Peng-B04994 <eagle.zhou@nxp.com>
Anson HuangAnson Huang
d1b8849b9efMLK-16681-2 ARM64: dts: freescale: imx8mq: update cpu-freq set-points Update cpu-freq set-points according to datasheet Rev-E: Normal Over-Drive Consumer 1GHz@0.9V 1.5GHz@1V Industrial 800MHz@0.9V 1.3GHz@1V Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Bai Ping <ping.bai@nxp.com>
Anson HuangAnson Huang
79152f63619MLK-16681-1 soc: imx: add speed grading check for i.MX8MQ different parts i.MX8MQ has different parts like consumer, industrial and auto etc., different parts have different cpu-freq set-points, this patch adds fuse check to select correct cpu-freq set-points for each part. The default dtb has all set-points available, then kernel will check fuse to disable those unused set-points, definition as below: OCOTP offset 0x440, bit [7:6] '00' - Consumer 0C to 95C '01' - Ext. Consumer -20C to 105...
Zhou Peng-B04994Zhou Peng-B04994
4b054d79c12MLK-16671-2 - [i.MX8QXP/Malone]: Add vpu malone decoder driver Add vpu module in device tree and makefile Signed-off-by: Zhou Peng-B04994 <eagle.zhou@nxp.com>
Anson HuangAnson Huang
9c6437c90cdMLK-16676-5 ARM64: dts: freescale: imx8qxp: add debug_console property Pass debug_console port info for power domain awareness. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Anson HuangAnson Huang
449b4db2794MLK-16676-4 ARM64: dts: freescale: imx8qm: add debug_console property Pass debug_console port info for power domain driver awareness. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Anson HuangAnson Huang
35029dae8d7MLK-16676-3 soc: imx: pm-domains: add debug console power management On i.MX8QM/i.MX8QXP, when "no_console_suspend" is added, need to keep debug uart power on for debug message output, support this case by reading debug uart resource from dtb and checking console suspend settings. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Anson HuangAnson Huang
79162fcb3b6MLK-16676-2 ARM64: dts: freescale: imx8qm: add early_power_on for intmux On i.MX8QM, intmux is registered as irq chip driver, it resumes earlier then generic power domain, so need to add early_power_on property. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Anson HuangAnson Huang
4aa9933d5fdMLK-16676-1 soc: imx: pm-domains: support multiple early_power_on resource On i.MX8QM/i.MX8QXP, there could be multiple resources need to be powered on earlier after resume, current variable of index could be reset for different power domain nodes and cause resource id overwrite issue, fix the array index type to support multiple early power on case. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Daniel BalutaDaniel Baluta
1c3cdba3d1dMLK-16668: PM / OPP: Move error message to debug level This is a backport of the following commit from linux-next as per customer request. author Fabio Estevam <fabio.estevam@nxp.com> commit 035ed07208dc501d023873447113f3f178592156 (patch) On some i.MX6 platforms which do not have speed grading check, opp table will not be created in platform code, so cpufreq driver prints the following error message: cpu cpu0: dev_pm_opp_get_opp_count: OPP table not found (-19) However, this is n...
Viorel SumanViorel Suman
0e259860a19MLK-16481: ASoC: fsl: amix: remove automatic OUTSRC selection Refactor AMIX driver by removing automatic OUTSRC selection and enforcing OUTSRC transition constraints as specified in AMIX documentation, "Mixer output processing" chapter. Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Daniel BalutaDaniel Baluta
8c7e51bb9a3MLK-16607: arm64: fsl-imx8qm-mek: Add headphone detect property With this patch 'Playback Volume' control is now usable and we can notice that the sound volume changes. BuildInfo: - SCFW f5910b7d, IMX-MKIMAGE fb52c576, ATF a438801 - U-Boot 2017.03-00047-g8fe8d6d Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com> Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Shengjiu WangShengjiu Wang
15db7a19effMLK-16674: ASoC: fsl_hifi4: enable pm runtime for hifi4 Enable pm runtime for hifi4, so the firmware may load many times, The shdr->sh_addr can't be refined in hifi4_load_firmware, otherwise it should impact the load operation in next time. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Zhou Peng-B04994Zhou Peng-B04994
f7e50fb3e7cMLK-16671-1 - [i.MX8QXP/Malone]: Add vpu malone decoder driver Integrate amphion release kernel functions Signed-off-by: Zhou Peng-B04994 <eagle.zhou@nxp.com>
Sandor YuSandor Yu
ba161432842MLK-16603: dtb: Disable imx8qm native hdmi/dp driver in it6263 dtb Only 25% iMX8QM SOC chip can support DP/HDMI function now. We may not find enough hdmi/dp work SOC chip for everyone. So lvds-hdmi display is the prime display for iMX8QM ARM2 board. Disable imx8qm native hdmi/dp driver in it6263 dtb make sure lvds-hdmi display is working with hdmi/dp function failed chip. Signed-off-by: Sandor Yu <Sandor.yu@nxp.com> (cherry picked from commit d4235299d583126edb5996e008be5366590252ee)
Sandor YuSandor Yu
cd64f5faa9cMLK-16614: dtb: Add mipi csi support in imx8qxp mek board Enable mipi csi driver imx8qxp mek board. Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Sandor YuSandor Yu
f41fc85012bMLK-16613: dtb: Add mipi csi support in imx8qm mek board Enable mipi csi driver in imx8qm mek board. Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Han XuHan Xu
a0c73d6b99eMLK-16669: arm64: dts: access nor chip via lpspi on i.MX8QXP ARM2 base board To access the nor chip on i.MX8QXP ARM2 base board, enable the lpspi in device tree, the gpio_cs is also needed. BuildInfo: - SCFW 9e9f6ec6, IMX-MKIMAGE e1b3bc76, ATF 0 - U-Boot 2017.03-00072-gfdcf70a Reviewed-by: Frank Li <frank.li@nxp.com> Signed-off-by: Han Xu <han.xu@nxp.com>
Zhou Peng-B04994Zhou Peng-B04994
7a96128e2d8MLK-16502 - [i.MX8MQ/Hantro]: Implement dynamic clock adjustement in high temperature Register thermal notifier and implment dynamic clock - One module parameter is added to enable or disable dynamic clock: 'hantro_dynamic_clock' Default, dynamic clock is disabled - One module parameter is added to adjust ratio: 'hantro_clock_ratio' Default, decrease to 1/2 clock when receiving hot event Signed-off-by: Zhou Peng-B04994 <eagle.zhou@nxp.com>
guoyin.chenguoyin.chen
d3fd66314f7MA-10480 Make CONFIG_I2C_IMX to depend on CONFIG_ARCH_MXC_ARM64 imx8mscale evk uses the i2c imx driver to control the pfuze driver otherwise pfuze driver wont be probed with I2C_IMX Change-Id: Iaeacde58a4cbe34a3d18cb16814d2334c74c2b79 (cherry-picked from commit ad7200824fa740a1fe9d418d3f949ff97b083bdf) Signed-off-by: guoyin.chen <guoyin.chen@nxp.com>
Li JunLi Jun
a6deab5f903MLK-16576 usb: phy: mxs: set hold_ring_off for USB2 PLL power up USB2 PLL use ring VCO, when the PLL power up, the ring VCO’s supply also ramp up. There is a possibility that the ring VCO start oscillation at multi nodes in this phase, especially for VCO which has many stages, then the multiwave will kept until PLL power down. Hold_ring_off(bit11) can force the VCO in one determined state when VCO supply start ramp up, to avoid this multiwave issue. Per IC design's suggestion it's better thi...
Dong AishengDong Aisheng
e01d111edc0MLK-16606-4 arm64: dts: imx8qm-mek: add flexcan support CAN0 and CAN1 share the same transceiver STBY and EN signals while CAN2 uses a separated one. Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Dong AishengDong Aisheng
2a5fbedea69MLK-16606-3 arm64: dts: imx8qm-mek: add pca6416 IO expander support NXP pca6416 is compatible with TI tca6416 and it's on M41 I2C bus. Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>