linux-wandboard

MLK-17590-02 driver: soc: imx: update the busfreq flow on imx8mq

Currently, on imx8mq evk board, we only support 3200mts and 667mts
frequency setpoints. So the DDR DVFS flow need to be updated accordingly.

The dram pll and dram apb clock rate is changed in ATF when doing frequency,
in kernel side, we need to call the clk API to update the clock rate info
in clock tree.

Signed-off-by: Bai Ping <ping.bai@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
(cherry picked from commit ff82ef826f8d2e609e5144c2e98de30bc8ea2547)