Commits
Shengjiu Wang committed c27001f47be
MLK-16350-6: ASoC: fsl_esai: fix the slow bit clock rate When the mclk is 49M, but hk_rate is 24M, condition for search the corret pm parameter is wrong. which cause the pm=999, then the output bit clock rate is very small. Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>