Commits
Fancy Fang committed a1113043638
MLK-16706-4 video: fbdev: mipi_dsi_northwest: improve phy pll config
The MXL PLL uses the following function to generate
the output clock 'CLKOUT' based on the input 'CLKREF'
(which is the reference clock):
"
CLKOUT = CLKREF * CM / (CN * CO);
CM range is in [16, 255];
CN range is in [1, 16];
CO range is in {1, 2, 4, 8};
"
So the DSI driver needs to derive proper 'CM', 'CN'
and 'CO' to get the required 'CLKOUT' based on the
'CLKREF'. This commit provides a general method to
derive the best 'CM', 'CN' and 'CO' values for any
required 'CLKOUT' and input 'CLKREF' combinations.
'best' means the actual generated output clock freq
is closest to the required 'CLKOUT' by using the
derived 'CM', 'CN' and 'CO'.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>