Commits
Ranjani Vaidyanathan committed 881e21c1275
ENGR00270573-2 [MX6SL]Add support for dynamic Power Gating of the display MIX The display MIX can be power gated when EPDC, PXP and LCDIF are all inactive. This will save around 1.5mW-1.8mW of power in system IDLE mode. Need to re-initialize the EPDC and PXP whenever the display MIX is powered up as all the register state is lost when the display MIX is power gated. Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>