Commits
Catalin Marinas committed 7092fc38ee7
[ARM] 4498/1: ARMv7: Remove the L2 cache configuration via the aux ctrl register The auxiliary control and the L2 auxiliary control registers are Cortex-A8 specific. They need to be removed from the generic ARMv7 support code. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>