Commits
Liu Ying committed 2c3a75e38a5
MLK-17371 gpu: imx: dpu: framegen: Use better timeout value to wait for ENSTS The DPU spec tells us that we need to wait for all pending frames to be completed when a display stream is disabled. It turns out that the hardcoded 60-microsecond timeout value is not enough for some low refresh rate video modes, e.g., 1920x1080@24, which makes the display stream be disabled incorrectly(leave the hardware an incorrect machine status). The SoC design indicates that there are two pending frames to complete in the worst case. This patch waits for at most three frame duration(which is enough for sure) so that the hardware may flush out all the pending frames. In case the clock subsystem provides us a pixel clock with wrong rate and causes the timeout value be unreasonably long, we truncate it to wait for at most three seconds. Signed-off-by: Liu Ying <victor.liu@nxp.com>