MLK-15071-1: ASoC: codecs: Add AK5558 ADC driver
The AK555x series is a 32-bit, 768 kHz sampling, differential input A/D
converter for digital audio systems. The datasheet is available here:
https://www.akm.com/akm/en/file/datasheet/AK5558VN.pdf
Signed-off-by: Mihai Serban <mihai.serban@nxp.com>
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
MLK-15033-2: ASoC: fsl: Add machine driver for AK4458
Add machine driver for i.MX boards that have AK4458 DAC attached to SAI.
Signed-off-by: Mihai Serban <mihai.serban@nxp.com>
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
MLK-15033-1: ASoC: codecs: Add support for AK4458 DAC
The AK4458 is a 32-bit 8ch Premium DAC, its datasheet is available here:
https://www.akm.com/akm/en/file/datasheet/AK4458VN.pdf
Signed-off-by: Mihai Serban <mihai.serban@nxp.com>
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
MLK-17352 defconfig: imx_v7_defconfig: enable SIMv2 in defconfig
To enable SIMv2 for imx6ul/imx7d, both CONFIG_MXC_SIMv2
and CONFIG_ARCH_MXC have to be enabled.
This patch enables these two config in imx_v7_defconfig for
SIMv2 support.
Signed-off-by: Gao Pan <pandy.gao@nxp.com>
Reviewed-by: Andy Duan <fugang.duan@nxp.com>
MLK-17319-3 defconfig: enable EMVSIM in defconfig
enable EMVSIM in defconfig
Signed-off-by: Gao Pan <pandy.gao@nxp.com>
Reviewed-by: Andy Duan <fugang.duan@nxp.com>
MLK-17319-2 arm64: dts: add emvsim0 device node for imx8qm-mek
add emvsim0 device node for imx8qm-mek to support EMVSIM
Signed-off-by: Gao Pan <pandy.gao@nxp.com>
Reviewed-by: Andy Duan <fugang.duan@nxp.com>
MLK-17319-1 imx8: sim: add driver to support EMVSIM module
The EMVSIM module is designed to facilitate communication to
Smart Cards compatible to the EMV ver4.3 standard and compatible
with ISO/IEC 7816-3 Standard.
This patch adds driver to support EMVSIM module for imx8.
Signed-off-by: Gao Pan <pandy.gao@nxp.com>
Reviewed-by: Andy Duan <fugang.duan@nxp.com>
MLK-17366-2 usb: cdns3: decrease autosuspend timeout
Cadence3 low power sequence doesn't allow too much time gap
between xhci bus suspend and controller suspend,
otherwise, the disconnection will be seen between them.
Acked-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
MLK-17366-1 usb: cdns3: improve USB PHY operation
Improve USB PHY operation, and keep 32K clock for RX detection
all the time, it can fix SS connection can't be recognition
from U3.
Acked-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
usb: dwc3: Don't reinitialize core during host bus-suspend/resume
Driver powers-off PHYs and reinitializes DWC3 core and gadget on
resume. While this works fine for gadget mode but in host
mode there is not re-initialization of host stack. Also, resetting
bus as part of bus_suspend/resume is not correct which could affect
(or disconnect) connected devices.
Fix this by not reinitializing core on suspend/resume in host mode
for HOST only and OTG/drd configurations.
Signed-off-by: Manu Gautam ...
MLK-17399 ARM64: dts: imx8mq: enable usb3 link PM
Enable USB3 hardware link power management, so the link can enter
U1 and U2 if there is no data transfer if the deivce can support
them.
Signed-off-by: Li Jun <jun.li@nxp.com>
MLK-17385: dma: imx-sdma: update sdma script for multi fifo on SAI
update sdma script for multi fifo SAI on i.mx8MQ.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
MLK-17368-4: drm: imx: dcss: add modifier checks
This patch activates modifiers in CRTC and adds checks in the
atomic_check() callback so that only the allowed modifiers are accepted.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
MLK-17368-3: drm: imx: dcss: Add support for tiled formats
This patch effectively enables DTRC module in DCSS to decode tiled
formats from VPU:
* uncompressed G1;
* uncompressed G2;
* compressed G2;
Compressed G2 formats need to pass on the decompression table offsets,
by using the 'dtrc_dec_ofs' property. This is a 64 bit value like below:
64--------48----------32---------16---------0
|<- chroma table ofs ->|<- luma table ofs ->|
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
MLK-17368-2: drm: imx: dcss: split dcss_ctxld_write
In order for DTRC to work properly, we need to be able to write the DCTL
registers (to switch banks), just before activating CTXLD. However,
__dcss_ctxld_enable() function is usually called from irq context, or
whn the mutex is taken. Hence, create a function the can be called from
irq context.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
MLK-17368-1: drm: add fourcc codes for Verisilicon tiled formats
These formats will be used by VPU and DCSS.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
MA-11120 Fix screen mess with colorful grids issue on mx6dl ard board
The issue is reported on mx6dl ard board after add ion cacheable memory
support in patch "MA-10928 Add system contiguous heap to ion", root cause
is GPU will enable MMU when physical address large than 0x80000000.
ARD board has 2GB memory if not set base address GPU MMU will be enabled
and when GPU mapped address pass to 2D there will have problem. Fix the
issue by set phys_baseaddr=256M in mx6dl board dts, mx6q board alre...
MLK-17370 video: fbdev: mxc_edid: change '640x480' mode clock
For the '640x480' cea mode, change the 'pixclock' from
39722 ps to 39683 ps to satisfy the imx7ulp hdmi display
requirement.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
MLK-17371 gpu: imx: dpu: framegen: Use better timeout value to wait for ENSTS
The DPU spec tells us that we need to wait for all pending frames to
be completed when a display stream is disabled. It turns out
that the hardcoded 60-microsecond timeout value is not enough for
some low refresh rate video modes, e.g., 1920x1080@24, which makes
the display stream be disabled incorrectly(leave the hardware an
incorrect machine status). The SoC design indicates that there are
two pending frames to...
MLK-17369: soc:imx8qm/qxp: Add controls for display controller resets
"
commit cfdb9821531da523fd1f01536eb67c8b8451477f
Author: Oliver Brown <oliver.brown@nxp.com>
Date: Tue Jan 2 07:46:06 2018 -0600
dc: Add controls for display controller resets.
"
Signed-off-by: Oliver Brown <oliver.brown@nxp.com>
MLK-17367 imx8: pm-domains: fix restore parent for clk_stat_may_lost case
imx8_rsrc_clk->parent may be cleared during last probe failure.
So we need explicitly call CLK APIs clk_get_parent to get the cached
parent for the later restore. Otherwise, it may reparent to NULL parent
which results in 0 clk rate.
Fixes: 05caa1390f88cb (" MLK-17363-1 imx8: pm-domain: fix clock parent restore issue after suspend/resume")
Reviewed-by: Anson Huang <anson.huang@nxp.com>
Signed-off-by: Dong Aisheng <ais...
MLK-17275-15: arm64: dts: fsl-imx8qxp-lpddr4-arm2: Remove dsi/lvds specific dts files
Delete the dst files specific to dsi/lvds nodes for the 8QXP LPDDR4
platform.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
MLK-17275-14: arm64: dts: fsl-imx8qm-lpddr4-arm2: Remove dsi/lvds specific dts files
Delete the dst files specific to dsi/lvds nodes for the 8QM LPDDR4 platform.
Also, update the existing it6263 dts files accordingly.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
MLK-17275-13: arm64: dts: fsl-imx8qxp-mek: Remove dsi/lvds specific dts files
Delete the dst files specific to dsi/lvds nodes for the 8QXP MEK platform.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
MLK-17275-12: arm64: dts: fsl-imx8qm-mek: Remove dsi/lvds specific dts files
Delete the dst files specific to dsi/lvds nodes for the 8QM MEK platform.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
MLK-17275-11: dts: imx8qxp-lpddr4: Enable IT6263 and ADV7535
Final step for the OF_DYNAMIC support: enable the LVDS and MIPI-DSI to
HDMI converter nodes by default in the main DTS file for each platform.
This patch enables these nodes for i.MX8QXP LPDDR4 board.
Also, use adi,dsi-channel = <1> for ADV7535, since the panel can only work
on channel 0. By using channel 1 for ADV7535, we can have them work
simultaneously: one on DSI0 and the other on DSI1.
Signed-off-by: Robert Chiras <robert.ch...
MLK-17275-10: dts: imx8qm-lpddr4: Enable IT6263 and ADV7535
Final step for the OF_DYNAMIC support: enable the LVDS and MIPI-DSI to
HDMI converter nodes by default in the main DTS file for each platform.
This patch enables these nodes for i.MX8QM LPDDR4 board.
Also, use adi,dsi-channel = <1> for ADV7535, since the panel can only work
on channel 0. By using channel 1 for ADV7535, we can have them work
simultaneously: one on DSI0 and the other on DSI1.
Signed-off-by: Robert Chiras <robert.chir...
MLK-17275-9: dts: imx8qxp-mek: Enable IT6263 and ADV7535
Final step for the OF_DYNAMIC support: enable the LVDS and MIPI-DSI
to HDMI converter nodes by default in the main DTS file for each
platform.
This patch enables these nodes for i.MX8QXP MEK board.
Also, use adi,dsi-channel = <1> for ADV7535, since the panel can
only work on channel 0. By using channel 1 for ADV7535, we can have them
work simultaneously: one on DSI0 and the other on DSI1.
Signed-off-by: Robert Chiras <robert.chiras@nx...
MLK-17275-8: dts: imx8qm-mek: Enable IT6263 and ADV7535
Final step for the OF_DYNAMIC support: enable the LVDS and MIPI-DSI to
HDMI converter nodes by default in the main DTS file for each platform.
This patch enables these nodes for i.MX8QM MEK board.
Also, use adi,dsi-channel = <1> for ADV7535, since the panel can only
work on channel 0. By using channel 1 for ADV7535, we can have them work
simultaneously: one on DSI0 and the other on DSI1.
Signed-off-by: Robert Chiras <robert.chiras@nxp....
MLK-17275-7: drm/bridge: adv7511: Add dsi-channel property
Add a new property "adi,dsi-channel" to allow the user specify the DSI
channel to be used when communicating with DSI peripheral.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Reviewed-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
MLK-17275-6: arm64: defconfig: Add support for OF_OVERLAY
Enable CONFIG_OF_OVERLAY, so we can use the OF_DYNAMIC API in order to
dynamically reconfigure the devicetree at runtime, based on i2c probing.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Reviewed-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
MLK-17275-4: drm/imx: nwl_dsi-imx: Update driver for reconfig
Initially, this driver was designed to work with NWL driver as a
drm_bridge and it is required for this to work, otherwise it will defer.
When CONFIG_OF_DYNAMIC is used, the NWL bridge can be disabled by it's
remote endpoint, it that endpoint is an i2c capable device and it fails
to find a physical device on the expected i2c address.
If the NWL drm_bridge is disabled, since this driver it is required by
the master DRM device, just...
MLK-17275-3: drm/bridge: nwl-dsi: Fix remove/detach
Add a check in detach function, so that the mipi_dsi_host_unregister
will occur only if the host was registered.
Also, remove the unnecessary calls to host_unregister from probe and
remove functions.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Reviewed-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
MLK-17275-2: drm/bridge: it6263: Add support for OF_DYNAMIC
When CONFIG_OF_DYNAMIC is used, and this driver is enabled in
devicetree, but fails to probe a physical i2c client, it should disable
it's remote endpoint, so that the DRM master device won't fail to bind
the other available devices.
Usually, the remote endpoint of this device is a DRM encoder. If a DRM
encoder fails to bind, the DRM master device will also fail to bind.
This is why, we should disable the encoder node dynamically in...
MLK-17275-1: drm/bridge: adv7511: Add support for OF_DYNAMIC
When CONFIG_OF_DYNAMIC is used, and this driver is enabled in
devicetree, but fails to probe a physical i2c client, it should disable
it's remote endpoint, so that the DRM master device won't fail to bind
the other available devices.
Usually, the remote endpoint of this device is a DRM encoder. If a DRM
encoder fails to bind, the DRM master device will also fail to bind.
This is why, we should disable the encoder node dynamically i...
MLK-17363-2 imx8: pm-domain: clocks list should be initialized only once.
The clocks list associated with a PD is the same across all devices
attached to the same PD. Re-initializing it each time a new device is
attached results in missing some clocks.
[ Aisheng: "Improve commit message" ]
Reviewed-by: Anson Huang <anson.huang@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>
MLK-17363-1 imx8: pm-domain: fix clock parent restore issue after suspend/resume
Currently the clock parent actually is failed to be restored in power
domain driver due to the set_parent will bail out early as the clk core
already cached the same old parent.
Implement a CLK_SET_PARENT_NOCACHE flag in clk core and register all
SC mux clocks with this flag to make sure the clk core won't bypass
the SC clock parent setting.
[ Aisheng: "Add commit message" ]
Reviewed-by: Anson Huang <anson.hu...
MLK-17280-2: arm64: dts: fsl-imx8qxp-mek: Add DSI panel reset-gpio
Add the reset-gpio property for the DSI panels so that power ON/OFF can
work properly.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Reviewed-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
MLK-17280-1: drm: panel: rm67191: Fix power on sequence
According to the vendor driver sample there is a sleep after the exit
sleep and display on commands, but it seems that these sleeps are only
causing stability issues when the display signal is sent to the panel,
so remove them.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Reviewed-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
MGS-3565 [#ccc] fix coverity issue 1477294
unmap_attachment to free the sg_table when failed to call _DmabufAttach
Date: Jan 10, 2018
Signed-off-by: Yuchou Gan<yuchou.gan@nxp.com>
MLK-17355-1: ASoC: fsl_mqs: Fix potential uninitialized pointer read
Initialize gpr_np in order to avoid potential unitialized
pointer read in the section following the "out:" label.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
MLK-17311-2 gpu: imx: imx8_dprc: No need to round up height to 64
It's necessary to make DPR baddr lie on the alignment block,
but no need to round up height to 64.
Signed-off-by: Meng Mingming <mingming.meng@nxp.com>
MLK-17311-1 gpu: imx: dpu: common: Set SC_C_KACHUNK_CNT as 32
The SC_C_KACHUNK_CNT is for dpu blit and represents
how many cycle counts is need to trigger DPR after
DPU shadow being loaded. The initial value is 0x20,
and will change to 0 after the first frame if not set.
So it need be set with a value greater than 0x20.
Signed-off-by: Meng Mingming <mingming.meng@nxp.com>
MLK-17341-3: dts: Add power up pin for imx8qxp
Add gpio0_mipi_csi0 propriety.
Add power up pin for max9286.
Acked-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
