MLK-15004-6: Document: sound: update document for audio
update compatible string for imx-audio-cs42888.txt and fsl,esai.txt
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
MLK-15004-5: clk: imx: fix AUD_MLCKOUT0 and AUD_MLCKOUT1 parent issue
Correct these two audio clock's parent.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
MLK-15004-4: ASoC: fsl_esai: esai workaround for imx8qxp Rev1
In imx8qxp rev1, there is hardware issue (TKT331800). ESAI
dma request signal connection issue in SS_ADMA top level
integration, The ESAI dma request signal are active_low, the EDMA
input is high active, but there is no polarity convert logic
between them.
This patch is to add a workaround for this issue. It use the
GPT to convert dma request signal to EDMA, and use anther GPT
to clear the dma request.
Signed-off-by: Shengjiu Wa...
MLK-15004-3: ASoC: fsl_esai: switch to use imx-pcm-dma-v2
The difference of imx-pcm-dma and imx-pcm-dma-v2 is that first
one will request dma channel in probe, the second one request
dma channel when substream is opened.
When the case is ASRC+ ESAI, the FE+BE is working, which need
to reconfigure the dma channel, so use the imx-pcm-dma-v2 is
more flexible
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
MLK-15004-2: ASoC: fsl_acm: add acm header file
This header file define the offset for control registers
and the GPT capture event.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
MLK-15004-1: ASoC: codec: cs42xx8: Add reset gpio of codec
Need to set the reset pin high when running, otherwise the chip
will remain in reset state.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
MLK-15003-3: ARM64: dts: add one more cell in edma note
Add one more cell in edma note, which is the property of
local/remote access. The default access is local.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
MLK-15003-2: Document: fsl_edma_v3: update document
update fsl_edma_v3 document for #dma-cell is changed
one more cell is added, which is for local/remote access.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
MLK-15003-1: DMA: fsl-edma-v3: add one more parameter for xlate
The parameter is "is_remote", which is to use remote access for
edma, the default access is local access.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
MLK-15009 irqchip: imx-irqsteer: correct type of irqstat
The type of irqstat in irqsteer_irqchip_data unsigned long, actually
it needs to be 32bits width, so use unsigned int.
And use sizeof(irqsteer_data->irqstat[0]), instead of 4 when alloc
memory for irqsteer_data.
for_each_set_bit needs the second param type is unsigned long *, so
cast the irqsteer_data->irqstat to unsigned long *, this is safe here.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
MLK-15008-3 ARM64: dts: freescale: imx8: remove local-timer-stop flag
On i.MX8QM, as there is no SoC platform broadcast timer
available now, remove the local-timer-stop flag for
cpu-idle driver.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
MLK-15008-2 ARM64: dts: freescale: imx8qm: update cpu-freq opp table
Update i.MX8QM cpu-freq opp table according to SCFW setting,
and move the cpu-freq opp table to soc dtsi instead of board
dtb, as it is SoC feature.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
MLK-15008-1 ARM64: dts: freescale: imx8qxp: update cpu-freq opp table
Update i.MX8QXP cpu-freq opp table according to SCFW setting,
and move the cpu-freq opp table to soc dtsi instead of board
dtb, as it is SoC feature.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
MGS-2947 enable gpu subsystem for imx8qm and imx8qxp
enable gpu subsystem device config for imx8qm and imx8qxp,
enable builtin GPU module in kernel image by default
Signed-off-by: Xianzhong <b07117@freescale.com>
MLK-15005-03 irqchip: irqsteer: add ipg clock support
Some subsystems have lpcg sw_bit to control the ipg_clk to LIS,
so add the ipg clock for the module.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
MLK-14968-2 ARM64: dts: fsl-imx8: add usdhc1 support HS400 mode
Add usdhc1 support for HS200/HS400 mode for imx8qm and imx8qxp.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
MLK-15002 mmc: sdhci-esdhc-imx: fix HS400 timing issue
commit 3f0191b80cf1 ("MLK-14381 mmc: sdhci-esdhc-imx: reset tuning
circuit when system resume") add tuning reset when the timing is
MMC_TIMING_LEGACY/MMC_TIMING_MMC_HS/MMC_TIMING_SD_HS. For timing
MMC_TIMING_MMC_HS, we can not do tuning reset, otherwise HS400
timing is not right.
Here is the process of config HS400, it do tuning in HS200 mode,
then switch to HS mode and 8 bit DDR mode, finally switch to HS400
mode. If we do tuning reset...
MLK-14993 clk: imx: check pd before use
If we could not get a valid pd for gate/mux, print a warning log.
And use IS_ERR_OR_NULL to check the pd pointer.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
MLK-14997-4: ASoC: fsl: add hifi4 dsp driver
The function of driver is to communicate with hifi firmware.
The mu13 is dedicated for hifi communication, driver allocate
a share memory for message transfer between driver and firmware.
The calling sequence is that LOAD_CODEC,INIT_CODEC,CODEC_OPEN,
DECODE_ONE_FRAME, CODEC_CLOSE.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
MLK-14997-2: include: uapi: add hifi header file
add hifi header file, which is used by user space.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
MLK-14985-3 defconfig: add sensors support
fxas2100: CONFIG_SENSORS_FXAS2100X
fxos8700: CONFIG_SENSORS_FXOS8700
isl29023: CONFIG_INPUT_ISL29023
mpl3115 : CONFIG_INPUT_MPL3115
This patch also enable CONFIG_INPUT_POLLDEV, because sensor driver
depends on input-polldev.c
Signed-off-by: Gao Pan <pandy.gao@nxp.com>
MLK-14982-1 imx8: lpi2c: add ipg clk for lpi2c driver
The lpi2c IP needs two clks: ipg clk and per clk. The old lpi2c
driver missed ipg clk. This patch adds ipg clk for lpi2c driver.
V2: enable ipg clk before module clock
disable module clock before ipg clk
Signed-off-by: Gao Pan <pandy.gao@nxp.com>
MLK-14995: ARM: dts: nand-on-flash flag set in wrong device node
nand-on-flash-bbt flag for i.mx6sx sabreauto dtb was set in wrong device
node, move it back to gpmi node.
Signed-off-by: Han Xu <han.xu@nxp.com>
MLK-14989: ASoC: fsl_rpmsg_i2s: enable pm_qos for audio
with "echo 1 > /sys/class/graphics/fb0/blank", and there is no
usb connected on board, the system may enter low power mode,
then audio playback will be failed. use pm_qos to prevent A7
core enter low power mode during audio playback and recording.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
MLK-14874 ARM: imx7d: Ensure ARM clock only disabled if cpus in same state
GPC will stop ARM clock if both CPUs are in idle and CPU_CLK_ON_LPM is
set in GPC_LPCR_A7_BSC. Make sure that doesn't happen when cpu1 enters
state2 and cpu0 enters state0 because the default arm WFI state is not
marked with CPUIDLE_FLAG_TIMER_STOP and it can result in arch_sys_timer
being stopped unexpectedly.
It is possible to reproduce incorrect behavior by explicitly disabling
other idle states for cpu0/cpu1 and ...
ARM64: DMA: Export dma operation APIs for arm64 platform
Some DMA operation APIs are not exported, so when load driver as module,
there will error saying some APIs can not be found.
This patch exported these DMA related APIs.
Signed-off-by: Shawn Xiao <b49994@freescale.com>
MLK-14980 tty: serial: fsl_lpuart: remove unnecessary .async_tx_ack()
lpuart only use NXP/FSL eDMA dmaengine in i.MX/Vybrid/LS1021a platform,
and eDMA driver don't reuse descriptor then no need to check the
flag DMA_CTRL_ACK. And current eDMA driver use virt chan mechanism and
free tx_descriptor memory after .callback(), but .lpuart_timer_func()
first to terminate the chans that free the tx_descriptor memory, then
access the tx->flags, which cause kmem_cache_alloc() failed to allocate
the fr...
MLK-14978 irqchip: irqsteer: add NXP imx8 irq steer controller support
The IrqSteer module redirects/steers the incoming interrupts to output
interrupts of a selected/designated channel as specified by a set of
configuration registers.
NXP i.MX8x chips integrate IrqSteer controller for some DSC to share irq
line for all modules in the subsystem which can reduce the IRQ lines
connected to the parent interrupt controller GIC, so IrqSteer irqchip
acts as the second irq domain in the system.
S...
PCI: imx6: Allow probe deferral by reset GPIO
Some designs implement reset GPIO via a GPIO expander connected to a
peripheral bus. One such example would be i.MX7 Sabre board where said
GPIO is provided by SPI shift register connected to a bitbanged SPI bus.
To support such designs, allow reset GPIO request to defer probing of the
driver.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix...
MLK-14957 clk: imx8qm/qxp: delay the clk driver initialization
Using CLK_OF_DECLARE will register clks at very early stage
that AP-SC communication still not ready.
MU driver is registered by early_initcall, so using core_initcall
to delay the registeration of clk driver is ok.
Move channel open function into probe to avoid core_init sequence
not in our expected order. If MU not ready, return defer probe
for clk driver.
Later when we switch to use interrupt driver AP-SC communication,
we ...
