Yocto Project Linux Firmware
  1. Yocto Project Linux Firmware

linux-wandboard

Public

Network

 
AuthorCommitMessageCommit Date
Fugang DuanFugang Duan
95ee186b044MLK-15031-03 tty: serial: fsl_lpuart: fix the typo in clock get failed path Fix the typo in ipg clock get failed path. Signed-off-by: Fugang Duan <fugang.duan@nxp.com> Reviewed-by: Robin Gong <yibin.gong@nxp.com>
Fugang DuanFugang Duan
0b078d1134eMLK-15031-02 tty: serial: fsl_lpuart: free the rx dma buffer when port is closed Free the rx dma buffer when the port is closed. Signed-off-by: Fugang Duan <fugang.duan@nxp.com> Reviewed-by: Robin Gong <yibin.gong@nxp.com>
Fugang DuanFugang Duan
c2a80208c84MLK-15031-01 tty: serial: fsl_lpuart: drop the error frame Since the driver stats the error frames in port.icount.frame, it can drop the error frame that no need to push it to the tty buffer. Signed-off-by: Fugang Duan <fugang.duan@nxp.com> Reviewed-by: Robin Gong <yibin.gong@nxp.com>
Adrian HunterAdrian Hunter
d654c7a781fmmc: sdhci: Do not use spin lock in set_ios paths The spin lock is not necessary in set_ios. Anything that is racing with changes to the I/O state is already broken. The mmc core already provides synchronization via "claiming" the host. So remove spin_lock and friends from sdhci_set_ios and related callbacks. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Tested-by: Ludovic Desroches <ludovic.desroches@microchip.com> (cherry picked...
Cristina CiocanCristina Ciocan
eedeb5fb176MLK-15027: arm: pxp: Fix uninitialized use of variables This patch fixes build warning that 2 variables may be used uninitialized in the pxp_fetch_config() function in drivers/dma/pxp/pxp_dma_v3.c . The variables in_fmt and out_fmt are passed as parameters to pxp_fetch_shift_calc() only if shift_bypass is false. This flag cannot be false unless changed in a code block that also assigns in_fmt and out_fmt. Since the compiler cannot detect this flow, it shows a warning that in_fmt and out_fm...
Han XuHan Xu
df06568da8bMLK-15052-6: ARM: config: Disable the setting CONFIG_MTD_SPI_NOR_USE_4K_SECTORS Disable the SECT_4K setting for UBIFS test Signed-off-by: Han Xu <han.xu@nxp.com> Acked-by: Frank Li <frank.li@nxp.com>
Han XuHan Xu
f66feec9388MLK-15052-5: ARM64: defconfig: add flexspi in default config enable flexspi in default config file Signed-off-by: Han Xu <han.xu@nxp.com> Acked-by: Frank Li <frank.li@nxp.com>
Han XuHan Xu
2052ada688fMLK-15052-4: mtd: spi-nor: fix the micron/st issue Some MICRON related macros in spi-nor domain were ST, actually. We need to add the REAL micron defination in header/source files for mt35xu512aba Micron Octal Nor chip. Signed-off-by: Han Xu <han.xu@nxp.com> Acked-by: Frank Li <frank.li@nxp.com>
Han XuHan Xu
1fe46eebceaMLK-15052-3: mtd: spi-nor: enable octal read mode in spi framework Enhanced spi-nor framework to support octal read mode Signed-off-by: Han Xu <han.xu@nxp.com> Acked-by: Frank Li <frank.li@nxp.com>
Han XuHan Xu
d0d68444109MLK-15052-2: mtd: flexspi-nor: support flexspi-nor driver on i.MX8 support the flexspi nor controller for i.MX8 platforms, read data in octal ddr mode by default. Signed-off-by: Han Xu <han.xu@nxp.com> Acked-by: Frank Li <frank.li@nxp.com>
Han XuHan Xu
f305d73e630MLK-15052-1: ARM64: dts: add flexspi in 8qxp device tree add the flexspi device tree node for i.mx8qxp Signed-off-by: Han Xu <han.xu@nxp.com> Acked-by: Frank Li <frank.li@nxp.com>
Chanwoo ChoiChanwoo Choi
52ff52bfe6busb: chipdata: Replace the extcon API This patch uses the resource-managed extcon API for extcon_register_notifier() and replaces the deprecated extcon API as following: - extcon_get_cable_state_() -> extcon_get_state() Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Peter Chen <peter.chen@nxp.com> (cherry picked from commit 3f991aa0b665c8e9bb702421a4e5005c3588fb62)
Roger QuadrosRoger Quadros
f42cf82c5c7extcon: usb-gpio: Don't miss event during suspend/resume We must check for ID/VBUS changes during resume irrespective of whether our device wakeup is enabled or not. Without this we seem to be missing ID/VBUS events after system suspend/resume. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> (cherry picked from commit 8680b4d1933fbe3349d51a4e1fd4513b12abffed)
Peter ChenPeter Chen
4df31989141extcon: usb-gpio: Do not enable USB as wakeup source by default Whether the USB port as a wakeup source should be determined by user, but not enabled by default. Signed-off-by: Peter Chen <peter.chen@nxp.com> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> (cherry picked from commit 98fd079297dd274c15c926a337253675573c5832)
Peter ChenPeter Chen
26962dc5ea8extcon: usb-gpio: Add pinctrl operation during system PM At some systems, the pinctrl setting will be lost or needs to set as "sleep" state to save power consumption. So, we need to configure pinctrl as "sleep" state when system enters suspend, and as "default" state after system resumes. In this way, the pinctrl value can be recovered as "default" state after resuming. Signed-off-by: Peter Chen <peter.chen@nxp.com> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> (cherry picked from com...
Roger QuadrosRoger Quadros
cfd1fe61cadextcon: usb-gpio: Add VBUS detection support Driver can now work with both ID and VBUS pins or either one of them. There can be the following 3 cases 1) Both ID and VBUS GPIOs are available: ID = LOW -> USB_HOST active, USB inactive ID = HIGH -> USB_HOST inactive, USB state is same as VBUS. 2) Only ID GPIO is available: ID = LOW -> USB_HOST active, USB inactive ID = HIGH -> USB_HOST inactive, USB active 3) Only VBUS GPIO is available: VBUS = LOW -> USB_HOST inactive, USB inactive VBUS...
Li JunLi Jun
3cfaeb8f2bbMLK-15032-3 usb: chipidea: core: remove the extcon change for imx_4.1.y commit 916e43e1d6fb ("MLK-13570-3 usb: chipidea: core: change extcon usage for imx_4.1.y") is directly cherry-picked from 4.1.y, but which is not valid anymore on 4.y kernel, so revert most part and only keep the irq check after resume. Reviewed-by: Peter Chen <peter.chen@nxp.com> Signed-off-by: Li Jun <jun.li@nxp.com>
Li JunLi Jun
9fffd300552MLK-15032-2 Revert "extcon: usb-gpio: add pinctrl operation during system PM" This reverts commit 4c7d332e3316 ("MLK-13638-3 extcon: usb-gpio: add pinctrl operation during system PM"). We will use the upstream version. Reviewed-by: Peter Chen <peter.chen@nxp.com> Signed-off-by: Li Jun <jun.li@nxp.com>
Li JunLi Jun
8efd40ffb23MLK-15032-1 Revert "extcon: ext-usb-gpio: do not enable wakeup by default" This reverts commit 358776f8c5d8 ("MLK-13912-1 extcon: ext-usb-gpio: do not enable wakeup by default"), we will use the upstream patch version. Reviewed-by: Peter Chen <peter.chen@nxp.com> Signed-off-by: Li Jun <jun.li@nxp.com>
Mihai SerbanMihai Serban
960e9b8efc9MLK-15039: ASoC: fsl_esai: Fix channels swap when recording 3 channels audio The change introduced by commit 00c174b3b28a ("MLK-14525: ASoC: fsl_esai: channel swap issue in 3 channels or 5 channels") is no longer valid after improvements added with commit c35bc6ae5c48 ("MLK-14778: ASoC: fsl: imx-cs42888: Improve support for odd number of channels") Because we use TDM instead of I2S for 3,5 and 7 channels we must initialize ESAI with the actual number of channels. There is no need to count t...
Dong AishengDong Aisheng
6cd3c40ad92MLK-15046 arm64: dts: fsl-imx8qxp: change CAN1 & 2 to use CAN0 clk and power domain Per information from Ranjani: "Looks like all three CANs are controlled by one DSC clock slice (SLSLICE[4]). Currently the SCFW is only allocating this clock to CAN0, which explains why CAN0 works. And once CAN0 is enabled, CAN1 and CAN2 access will also work." This is a workaround patch to make CAN1 & CAN2 work temporarily. Once SCFW supports shared clock management for all CAN, we can revert this patch. ...
Dong AishengDong Aisheng
5d40b3d1d14MLK-15046-11 arm64: dts: fsl-imx8qxp-lpddr4-arm2: add flexcan support Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Dong AishengDong Aisheng
108018af764MLK-15046-10 arm64: defconfig: enable flexcan driver Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Dong AishengDong Aisheng
d07b7b00517MLK-15046-9 arm64: dts: imx8qm: add flexcan support Add flexcan 1, 2 ,3 support. Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Dong AishengDong Aisheng
1e71f29b156MLK-15046-8 can: flexcan: enable flexcan support for arm64 Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Dong AishengDong Aisheng
28fbfd2f3feMLK-15046-7 can: flexcan: add imx8qm support The flexcan on MX8QM supports CAN FD prototol. Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Dong AishengDong Aisheng
87a14d37270MLK-15046-6 can: flexcan: make MB mode store Remote frames In MB transfer mode, the Remote Response Frame is generated by default which will not store Remote Frames. That will cause MB can't resceive Remote Frames. Let's make the Remote Request Frame stored, then we can receive the Remote Frames and deliver to userspaces. Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Dong AishengDong Aisheng
99161bdb27eMLK-15046-5 can: flexcan: add can fd bitrate switch support Add can fd bitrate switch support Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Dong AishengDong Aisheng
4e5a870c269MLK-15046-4 can: flexcan: add can fd mode support Add CAN FD protocol support which supports extended frames up to 64 bytes. Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Dong AishengDong Aisheng
664ac8605aaMLK-15046-3 can: flexcan: make Message Buffer size and number dynamically The Message Buffer size and number will change in new Flexcan IP version supporting CAN FD protocol. Let's make them properties and assigned dynamically. And note that when CAN FD is enabled, the FlexCAN RAM is partitioned in blocks of 512 bytes, there may be hole within the block. Thus a help macro FLEXCAN_CANFD_MB_OFFSET is introduced to calculate the internal MB address offset properly within the RAM block. Signed...
Dong AishengDong Aisheng
379d461d0f9MLK-15046-2 can: flexcan: add message buffer rx support This patch adds the optional message buffer rx support which is controlled by the flag FLEXCAN_QUIRK_DISABLE_RX_FIFO. This can be used by the new Flexcan version support CAN FD which can only work with message buffer mode. Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Dong AishengDong Aisheng
6ac64250e84MLK-15046-1 can: flexcan: re-structure to decouple the dependency on fifo mode Current driver is highly dependent on the struct flexcan_regs layout which may vary once the Message Buffer is changed in the new flexcan version supporting CAN FD protocol. This patch tends to decouple the dependency on both register layout and underlying transfer mechanism (FIFO mode or Message buffer). The Message Buffer mode is still not supported which will be added later. To achieve this, struct flexcan_re...
Octavian PurdilaOctavian Purdila
e2ca04903b8MLK-15029 ARM: imx_v7_defconfig: remove CONFIG_MXC_GPU_VIV=y Commit 827acb06eaf00b83 ("MGS-2947 enable gpu subsystem for imx8qm and imx8qxp") sets MXC_GPU_VIV's default to yes so we should remove CONFIG_MXC_GPU_VIV=y from the defconfig. Signed-off-by: Octavian Purdila <octavian.purdila@nxp.com>
Philipp ZabelPhilipp Zabel
e01df07871edrm/imx: imx-ldb: remove unnecessary double disable check Since the atomic modeset conversion, this should not be an issue anymore. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> (cherry picked from commit cdda2df7e05d84fee0a8298076941928af036c73)
Frederic WeisbeckerFrederic Weisbecker
81f831b1396MLK-14859 nohz: Fix buggy tick delay on IRQ storms When the tick is stopped and we reach the dynticks evaluation code on IRQ exit, we perform a soft tick restart if we observe an expired timer from there. It means we program the nearest possible tick but we stay in dynticks mode (ts->tick_stopped = 1) because we may need to stop the tick again after that expired timer is handled. Now this solution works most of the time but if we suffer an IRQ storm and those interrupts trigger faster than ...
Gao PanGao Pan
63266e7cddbMLK-14999 arm: dts: imx7ulp: add ipg clk for i2c device node The lpi2c needs two clks, per clk and ipg clk. This patch adds ipg clk for lpi2c device node. Signed-off-by: Gao Pan <pandy.gao@nxp.com>
Frank LiFrank Li
1d3c608538dMLK-15016-2: arm64: defconfig: added mfgtools defconfig Added new config for mfgtools Signed-off-by: Frank Li <Frank.Li@nxp.com>
Frank LiFrank Li
3e123c60eabMLK-15016-1 arm64: dts: imx8qxp: enable chipidea otg port Enable OTG port Signed-off-by: Frank Li <Frank.Li@nxp.com>
Robin GongRobin Gong
e4b02569ccdMLK-15014 dma: fsl-edma-v3: clear DONE before E_SG enabled Below described in RM, otherwise, channel error status(CHa_ES) may be triggered: The user must clear the CHa_CSR[DONE] bit before writing the TCDa_CSR[MAJORELINK] or TCDa_CSR[ESG] bits. Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Shenwei WangShenwei Wang
7520ac82062MLK-14748 clocksource: imx-tpm: Increase the min_delta The current min_delta for TPM clock event is 2 ticks which is too small. As the TPM is running at 3MHz, 2 ticks equal 2/3 us. According to our testing, the interrupt latency will be longer than this min_delta, especially when GPU is running. This patch changed the min_delta to 300 which give the system around 100us for interrupt handling in case the "set_next_event" call is interrupted by other signals. Also a simple validation code is...
Anson HuangAnson Huang
7b1f63b7a8bMGS-2842 ARM: imx: correct PFD setting rate flow According to design, PFD needs to be gated before setting rate, this patch adds warning for PFD when there is any try to set PFD rate with gate open; Since PFD may be enabled during kernel boot up, here doing enable and disable before setting APLL_PFD2 rate is to make sure it is gated by clock framework before setting rate. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> (cherry picked from commit bc731e14dc8401efa55fee65948c3ec31c9e5483)
Bai PingBai Ping
a4f279cf0edMLK-14972-04 dts: imx8: add thermal nodes for imx8qm/qxp Add thermal device related dts node for i.MX8QM/QXP. Signed-off-by: Bai Ping <ping.bai@nxp.com>
Bai PingBai Ping
4f440b6cc42MLK-14972-03 ARM64: cofnigs: Enable i.MX8QM/QXP thermal driver by default Enable the i.MX8QM/QXP thermal driver support in defconfig. Signed-off-by: Bai Ping <ping.bai@nxp.com>
Bai PingBai Ping
52cc50557d3MLK-14972-02 driver: thermal: Add i.MX8QM/QXP thermal support Add i.MX8QM/QXP thermal driver support. Signed-off-by: Bai Ping <ping.bai@nxp.com>
Bai PingBai Ping
2ed39106860MLK-14972-01 doc: dt-bindings: add imx sc temp sensor binding doc Add i.MX8QM/QXP temp sensor binding doc. Signed-off-by: Bai Ping <ping.bai@nxp.com>
Shengjiu WangShengjiu Wang
f58e343231cMLK-15006-2: ARM64: dts: enable esai and cs42888 in imx8qm dts Enable ESAI, ASRC, CS42888 in imx8qxp validation board. Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Shengjiu WangShengjiu Wang
ea30762b2e3MLK-15006-1: clk: imx8qm: fix AUD_MLCKOUT0 and AUD_MLCKOUT1 parent issue Correct these two audio clock's parent. Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Prabhu SundararajPrabhu Sundararaj
f657fbc508eMGS-2954 arm64: dts: mx8: GPU: Update Frequencies to match with design Update GPU frequencies for 8QM and 8QXP to match with design. Signed-off-by: Prabhu Sundararaj <prabhu.sundararaj@nxp.com>
Shengjiu WangShengjiu Wang
8facce78299MLK-15011: ARM64: dts: increase the cma size for imx8qxp Current the CMA size is 128M, after GPU enabled, there is no space left for other drivers. So increase it to 640M, which is align with imx8qm Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Shengjiu WangShengjiu Wang
290f7c2421fMLK-15004-8: ARM64: defconfig: built-in audio drivers built-in the CS42888 sound card, SPDIF and MQS. Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>