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AuthorCommitMessageCommit Date
Laurentiu PalcuLaurentiu Palcu
cf5572e71a0MLK-16922-1: drm: dcss: Add DCSS core power management support This patch support for suspend/resume and runtime PM in DCSS driver core. Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Laurentiu PalcuLaurentiu Palcu
78472d3ef7cMLK-16923-2: drm: imx: dcss: Add possibility to debug BLKCTL registers When debugging it's useful to be able to see the DCSS registers. BLKCTL was not added to the list of modules supporting this feature. This patch adds it. Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Laurentiu PalcuLaurentiu Palcu
0006ecb304fMLK-16923-1: drm: imx: dcss: dont't use static vars in blkctl If, in the future, a platform will have two DCSS controllers, having static variables holding various settings will not work out. Add a private structure instead. Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Sandor YuSandor Yu
2463ada374aMLK-16924: hdp: Disable HDP hotplug detect thread temporary HDMI Fw is unstable, hotplug detect thread may blocked at hdmi mailbox access. Disable hotplug detect thread function temporary. Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Fugang DuanFugang Duan
744d109889cMLK-16896 tty: serial: lpuart: flush transmit/receive fifo/buffer Although .startup() alreadly do transmit/receive fifo/buffer flush, but switch the baud rate may introduce dirty data on fifo, in such case, user will call tcflush() to clean up buffer and fifo. So driver also ensure HW fifo is cleaned up. The patch add hw fifo/buffer flush in .flush_buffer() callback. Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Robin GongRobin Gong
2e77a2d7a05MLK-16894: ARM64: configs: defconfig Enable CONFIG_CPU_FREQ_STAT. Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Bai PingBai Ping
790b902bdd0MLK-16920 ARM64: dts: imx8mq: Remove disp and hdmi power domains Remove the disp and hdmi power domain, these two power domain can NOT used for domain power management. Signed-off-by: Bai Ping <ping.bai@nxp.com> Reviewed-by: Anson Huang <Anson.Huang@nxp.com> Tested-by: Jian Li <jian.li@nxp.com>
Shengjiu WangShengjiu Wang
b2d3633b2b1MLK-16885-2: ASoC: imx-pcm-dma-v2: query the caps of dma query the caps of dma, then update the hw parameters according the caps. for EDMA can't support 24bit sample, but we didn't add any constraint, that cause issues. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Shengjiu WangShengjiu Wang
f23112747f5MLK-16885-1: DMA: imx-sdma: update the buswidth that is supported update buswidth that is supported by sdma. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Nicolin ChenNicolin Chen
9e9aa92b751dmaengine: imx-sdma: Correct src_addr_widths and directions The driver already supports DMA_DEV_TO_DEV in sdma_config(), DMA_SLAVE_BUSWIDTH_2_BYTES and DMA_SLAVE_BUSWIDTH_1_BYTE in sdma_prep_slave_sg(). So this patch adds them to the lists. Signed-off-by: Nicolin Chen <nicoleotsuka@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> (cherry-picked from commit f9d4a398f121b00f581da1428bff9b93d955452d)
Richard ZhuRichard Zhu
3ae437cf71aMLK-16818-2 PCI: imx: enable the pcie ep rc for imx8 Enable the PCIE EP RC for iMX8 RC access memory of EP: - EP: write the <ddr_region_address> to the bar0 of ep. - RC: access the <mem_base_address>, and this address would be mapped to the <ddr_region_address> of ep. Note: ddr_region_address mem_base_addr bar0_addr imx8mq 0xb820_0000 0x2000_0000 0x33c0_0010 imx8qxp 0xb820_0000 0x6000_0000 0x5f00_0010 imx8qm 0xb820_0000 0x7000_0000 ...
Richard ZhuRichard Zhu
5d09f2437cdMLK-16818-1 ARM64: dts: imx8: modify the dts to enable ep rc support - Correct the comments of iMX8QM PCIEB - Enlarge the CFG space of iMX8QXP PCIEB. - PCIE port maybe hard-wired in the hardware design. Use the hard-wired property to specify it on iMX8MQ. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Viorel SumanViorel Suman
fb2122da58fMLK-16738: ARM64: dts: qxp-lpddr4-arm2: amix: move SAIs MCLKs to AUD_PLL1 Move AMIX SAIs MCLKs to AUD_PLL1 and double the frequency in order to support 64k rate. Signed-off-by: Viorel Suman <viorel.suman@nxp.com> Reviewed-by: Frank Li <frank.li@nxp.com>
Viorel SumanViorel Suman
c56a323a7c8MLK-16738: ARM64: dts: qm-lpddr4-arm2: amix: move SAIs MCLKs to AUD_PLL1 Move AMIX SAIs MCLKs to AUD_PLL1 and double the frequency in order to support 64k rate. Signed-off-by: Viorel Suman <viorel.suman@nxp.com> Reviewed-by: Frank Li <frank.li@nxp.com>
Laurentiu PalcuLaurentiu Palcu
446865c67bfMLK-16911: drm: imx: dcss: do not advertise modifiers Since support for tiled formats has not been added to DCSS DRM driver, do not allow usage of FB modifiers by userspace. Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Laurentiu PalcuLaurentiu Palcu
06665972f5fMLK-16906: drm: imx: core: add possiblity to detect if chip has DCSS The Mscale Display Controller Subsystem does not support RGB565. However, the default legacy FB pixel depth is 16. Hence, the users would have to add a kernel cmdline option to set it to 32bpp: imxdrm.legacyfb_depth=32 This patch changes imx-drm-core to detect if platform has DCSS and, if it does, set the FB pixel depth to 32, so that user does not have to. Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Song BingSong Bing
a4802545615MLK-16910 ion: fixed KASAN issue Fixed KASAN issue. KASAN: use-after-free in mxc_custom_ioctl Signed-off-by: Song Bing <bing.song@nxp.com>
Sandor YuSandor Yu
98a8f825e5cMLK-16908-3: hdmi phy: Remove debug log Remove debug log Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Sandor YuSandor Yu
738f8358744MLK-16908-2: hdp: Support video modeset Add HDMI PHY configurated function to mode set. Add 720p60, 2160p30 and 2160p60 video mode to default video modes. Rewrite mode valid function. Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Sandor YuSandor Yu
ac90f9afddaMLK-16908-1: hdmitx: Support hdmi 2.0 to hdmi 1.4 reconfiguration Add HDMI 2.0 to HDMI 1.4 reconfiguration. Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Fugang DuanFugang Duan
6ae108d342aMLK-16909 irqchip: imx-irqsteer: restore registers after power off Once irqsteer controller is power off during suspend, the registers are lost, it should restore the registers after resume back. BuildInfo: - SCFW a479ff78, IMX-MKIMAGE ff9860c5, ATF 923651a - U-Boot 2017.03-00691-g96cf020 Signed-off-by: Fugang Duan <fugang.duan@nxp.com> Tested-by: Pandy.gao <pandy.gao@nxp.com> Acked-by: Pandy.gao <pandy.gao@nxp.com>
Fugang DuanFugang Duan
72f7b777726MLK-16890 arm64: dts: imx8qm/qxp: update enet pin setting enet pins dual voltage pads, bit[0] define the drive strength slection, bit[4:1] are reserved, and bit[6:5] define the pull down and pull up. The patch remove the reserved bits setting and pull up the pin. BuildInfo: - SCFW daf9431c, IMX-MKIMAGE 1c6fc7d8, ATF f2547fb - U-Boot 2017.03-00097-gd7599cf Signed-off-by: Fugang Duan <fugang.duan@nxp.com> Acked-by: Pandy.gao <pandy.gao@nxp.com>
Bai PingBai Ping
1342e8aa59aMLK-16902 ARM64: dts: Update the default critical temp setting on imx8mq i.MX8MQ silicon only has consumer and industrial part, for consumer part, the operating temperature range is 0C ~ 95C, so update the thermal driver critical temp to 95C. This is only a reference setting based on consumer part, if the silicon is for industrial use, please update the temperature according to the industrial part datasheet. Signed-off-by: Bai Ping <ping.bai@nxp.com>
Robin GongRobin Gong
955691a2610MLK-16891: watchdog: imx8_wdt: add pre_timeout notification Add pre_timeout set and notification for i.mx8qm/qxp. BuildInfo: - SCFW 36ff24f3, IMX-MKIMAGE 05d3d4a7, ATF 93dd1cc - U-Boot 2017.03-00684-g28c5243 Signed-off-by: Robin Gong <yibin.gong@nxp.com> Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
Han XuHan Xu
1f5cd078999MLK-16898: arm64: dts: add the power domain for flexspi0 add the power domain for flexspi0 for iMX8QM/QXP in device tree. Signed-off-by: Han Xu <han.xu@nxp.com>
Shengjiu WangShengjiu Wang
9919098fdd2MLK-16839-3: ASoC: fsl_esai: remove rate constrain for FE-BE case In FE-BE case, the constraint in BE cpu dai will propagate to FE. and the rate constaint is set by .be_hw_params_fixup in dai_link for BE. So rate constraint in BE cpu dai is not needed in FE-BE case. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Shengjiu WangShengjiu Wang
017abb9a392MLK-16839-2: ARM64: dts: add clock source for asrc add IMX8QM_ACM_AUD_CLK0_SEL and IMX8QM_ACM_AUD_CLK1_SEL for asrc clock source. There is no clock gate for them, only clock mux. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Shengjiu WangShengjiu Wang
be5e1af096fMLK-16839-1: ASoC: fsl_asrc: selec a proper clock source from the clock list In internal ratio mode, when the clock rate can't be divided with no remainder, The final convert ratio is not as expected, there is distortion in output data. So need to select a proper clock source for this mode, if can't find a good clock source, then swith to ideal ratio mode. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Shengjiu WangShengjiu Wang
543d4e8570bMLK-16837: ARM64: dts: fix the noise isse with mono stream When play the mono stream, there is no data in right channel, but if config the pin IO in pull up or pull down state, the codec can get no zero data in right channel, then user can hear noise. config the pin in no pull state to fix the noise issue. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Shengjiu WangShengjiu Wang
c1985ebfe9eMLK-16887-2: ARM64: dts: enable spdif2 and add sound card for hdmi arc enable spdif2 and add sound card for hdmi arc for mscale Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Shengjiu WangShengjiu Wang
c1d660d020cMLK-16887-1: drm: imx: hdp: add aux config for HDMI ARC Add aux config for HDMI ARC, the config is from the HDMI usr guide Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Sandor YuSandor Yu
242bd386bc4MLK-16888: hdp audio: support multi-type audio Add audio_type variable to support different audio type. Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Sandor YuSandor Yu
ee04bc3f924MLK-16886: hdp: Disable EDID function Disable EDID function temporary because edid read is unstable on some boards. Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Laurentiu PalcuLaurentiu Palcu
30e2fe18c75MLK-16814-2: arm64: dts: imx8mq-evk: Make drm DTS default Since video fbdev drivers will not be used anymore, make DRM dts default. This patch just renames the drm dts to fsl-imx8mq-evk.dts and updates the include lines in various dts files to point to the fbdev dts. Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Laurentiu PalcuLaurentiu Palcu
6d6c0e26104MLK-16814-1: arm64: dts: imx8mq-evk: copy default dts and add fbdev suffix Default dts will use DRM, hence this one will not be used anymore. However, other people may find fbdev drivers useful. So, instead of deleting it, copy it and add fbdev suffix to the dts name. This patch preceeds another patch that will make drm dts default. Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Sandor YuSandor Yu
5a5c84ee1c3MLK-16834-03: hdmi/dp phy: Enable additional PLL loop Amplifier. Addresses the PLL lock issue found on many devices. Signed-off-by: Sandor Yu <Sandor.yu@nxp.com> (cherry picked from commit 5e16126749b90e3e53fc8872b87d310ce808f84e)
Sandor YuSandor Yu
795265ee2f2MLK-16819-3: dts: Add HDMI CEC property to imx8mq dtb Add imx8 HDMI CEC property to imx8mq dtb. Change HDMI HDP Controller memory map size. Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Sandor YuSandor Yu
15902af3d9eMLK-16819-2: defconfig: Add CEC config Add CEC to defconfig. Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Sandor YuSandor Yu
7f9dfab39c5MLK-16819-1: CEC: Add HDMI CEC driver Add iMX8 HDMI CEC function. Support CEC MSG TX and RX function. Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Robin GongRobin Gong
c542b470697MLK-16841-2: ARM64: dts: freescale: fsl-imx8mq: add 'fsl,ratio-1-1' Add fsl,ratio-1-1 into mscale B0 chip. Please remove this property if you want to run A0 chip. Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Robin GongRobin Gong
b9c2d41eb89MLK-16841-1: dma: imx-sdma: add clock ration 1:1 check On i.mx8 mscale B0 chip, AHB/SDMA clock ratio 2:1 can't be supportted, since SDMA clock ration has to be increased to 250Mhz, AHB can't reach to 500Mhz, so use 1:1 instead. Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Liu YingLiu Ying
933a29a96ddMLK-16842 drm/imx: core: Add 32bit ioctrls support for 64bit processors Since we have 64bit processors running imx-drm, we should support 32bit ioctrls for them. Reported-by: Ivan Liu <xiaowen.liu@nxp.com> Tested-by: Ivan Liu <xiaowen.liu@nxp.com> Signed-off-by: Liu Ying <victor.liu@nxp.com>
Richard ZhuRichard Zhu
7a2876090baMLK-16836 PCI: imx: add the bus freq sysfile interface To support the bus freq power saving mode, add the sysfile interface. request bus high: echo 1 > /sys/devices/platform/xxxxxxxx.pcie/bus_freq release bus high: echo 1 > /sys/devices/platform/xxxxxxxx.pcie/bus_freq Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Fugang DuanFugang Duan
133ed2153d9MLK-16838 tty: serial: imx: add busfreq support for DMA mode Add busfreq support for DMA mode. Signed-off-by: Fugang Duan <fugang.duan@nxp.com> Reviewed-by: Robin Gong <yibin.gong@nxp.com>
Robin GongRobin Gong
4994f81f910MLK-16765-8 ARM64: dts: freescale: fsl-imx8qxp: enable PWRON key in dts Enable PWRON key in dts. Signed-off-by: Robin Gong <yibin.gong@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
Robin GongRobin Gong
bfcb9722625MLK-16765-7 ARM64: dts: freescale: fsl-imx8qm: enable PWRON key in dts Enable PWRON key in dts. Signed-off-by: Robin Gong <yibin.gong@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
Robin GongRobin Gong
02433025f4aMLK-16765-6 ARM64: configs: defconfig: enable imx_sc_pwrkey driver Enable imx_sc_pwrkey driver by default. Signed-off-by: Robin Gong <yibin.gong@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
Robin GongRobin Gong
45b6adeccfeMLK-16765-5 soc: imx: sc: ipc: enable SC_IRQ_BUTTON Enable SC_IRQ_BUTTON interrupt in SCU side. Signed-off-by: Robin Gong <yibin.gong@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
Robin GongRobin Gong
a3a410021d2MLK-16765-4 input: keyboard: imx_sc_pwrkey: add powerkey driver on i.mx8QM/QXP This powerkey driver is a virtual driver based on scfw which control SNVS ON/OFF in SCU side. The key interrupt triggered by MU notfication BuildInfo: - SCFW e7d95e1e, IMX-MKIMAGE 05d3d4a7, ATF 93dd1cc - U-Boot 2017.03-00684-g28c5243 Signed-off-by: Robin Gong <yibin.gong@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
Robin GongRobin Gong
87c4c0ff6c2MLK-16765-3 rtc: rtc-imx-sc: check group interrupt type Check group interrupt type and irq status type supported, return directlly if it's not the right group and interrupt status. Signed-off-by: Robin Gong <yibin.gong@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Anson Huang <Anson.Huang@nxp.com>