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AuthorCommitMessageCommit Date
Weiguang KongWeiguang Kong
bbfc0976d3bMLK-16450-1: ASoC: fsl_hifi4: fix crash issue caused by memcpy() When loop testing the hifi4 dirver, a random crash issue always occur when doing memcpy() in decode function. Have found that memcpy() is not suited to transfer data between kernel space and user space, so use copy_from_user() and copy_ to_user() function to replace memcpy() to fix this issue. Signed-off-by: Weiguang Kong <weiguang.kong@nxp.com>
Peng FanPeng Fan
4a4a1ef42d9MLK-16218 tty: serial: fsl_lpuart: use the sg count from dma_map_sg The dmaengine_prep_slave_sg needs to use sg count returned by dma_map_sg, not use sport->dma_tx_nents, because the return value of dma_map_sg is not always same with "nents". When enabling iommu for lpuart + edma, iommu framework may concatenate two sgs into one. Fixes: 6250cc30c4c4e ("tty: serial: fsl_lpuart: Use scatter/gather DMA for Tx") Signed-off-by: Peng Fan <peng.fan@nxp.com>
Viorel SumanViorel Suman
e6323a716c0MLK-16416-2 soc:imx Add support to save/restore clock parents In iMX8QM/iMX8QXP the clock parent set in HW is lost when devices are powered up/down as part of runtime-pm or suspend/resume. Add support to the power domain driver to save/restore clock parents associated with devices as part of power up/down. Signed-off-by: Viorel Suman <viorel.suman@nxp.com> Reviewed-by: Ranjani Vaidyanathan <ranjani.vaidyanathan@nxp.com>
Viorel SumanViorel Suman
fa104d8630eMLK-16416-1 clk: imx: scu mux: refactor set/get_parent method The current clk_mux_set_parent_scu() implementation returns error if device power domain is not enabled. As consequence of this the existing "assigned-clock-parents" DTS functionality cannot be used for clk_mux. In order to avoid returning error in "set_parent" the code is refactored as follows: a) On "set_parent" the "mux->reg" value is prepared and stored in "mux->val" field. The "mux->reg" is updated if power domain is enab...
Yuchou GanYuchou Gan
1ce15903e32MGS-3177-4 [#imx-701] fix the suspend/resume hang issue on imx6 The imx6q/6qp board have VG core,so that device->kernels[i]->hardware pointer of the VG core will be NULL, which cause invalid access to device->kernels[i]->hardware->forcePowerOff. This will lead to hang on suspend/resume test. Date: Sep 07, 2017 Signed-off-by: Yuchou Gan<yuchou.gan@nxp.com>
Zhou Peng-B04994Zhou Peng-B04994
f6d1a5da6a8MLK-16430 : [i.MX8MQ/Hantro]: Add support to handle interrupt timeout Add support to handle interrupt timeout. decoder won't be blocked and will report timeout event to application when no any interrupts are triggered. Signed-off-by: Zhou Peng-B04994 <eagle.zhou@nxp.com>
Richard ZhuRichard Zhu
c7271495aadMLK-16371-2 rpmsg: imx: add the rpmsg for imx8qxp Add rpmsg support for imx8qxp. The pingpong demo had been verified on 8qxp platforms. Use memset_io replace memset, because that the memory type of rpvq->addr is strong order type. There would be kernel dump when memset is used on imx8qxp. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Richard ZhuRichard Zhu
825a1f2648eMLK-16371-1 arm64: dts: imx8qxp: add the rpmsg support add the rpmsg support for imx8qxp. Based on intmux, the int31 of mu0_a0 of m4 side is used by rpmsg. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Anson HuangAnson Huang
099d4801a8aMLK-16415 thermal: imx_sc: add device cooling for all thermal zones For system controller thermal devices, add device cooling for all thermal zones, when temperature exceeds passive trip point, thermal driver will send out notification, all devices that register device cooling notification can take actions to cooling down the chip, such as for GPU, below message will be printed out: [ 581.284453] System is too hot. GPU3D will work at 1/64 clock. And when temperature drops to below passive...
Meng MingmingMeng Mingming
c17fd6ca89cMLK-16414 drm: Kbuild: add imx_drm.h to the installed headers Add imx_drm.h to the installed headers. Signed-off-by: Meng Mingming <mingming.meng@nxp.com>
Frank LiFrank Li
32d6239ea95MLK-16358-2: ARM: imx8mq: enable ddr perf monitor Enable DDR perf monitor support Signed-off-by: Frank Li <Frank.Li@nxp.com>
Frank LiFrank Li
9825a1fb4ceMLK-16358-1: ARM: FSL: DTS: enable arm pmu for A53 Enable A53 PMU for imx8 Signed-off-by: Frank Li <Frank.Li@nxp.com>
Guoniu.ZhouGuoniu.Zhou
97c296f764dMLK-16374-4: PxP: add AS and PS engine colorkey support Enable PS and AS colorkey function if user enable and set colorkey parameters of s0 and overlay buffer. Signed-off-by: Guoniu.Zhou <guoniu.zhou@nxp.com> (cherry picked from commit f2ed3bfca174b3e370fc37cd5f75a67334822093)
Guoniu.ZhouGuoniu.Zhou
6855cf59c06MLK-16374-3: PxP: improve stride parameter setting compatible In pxp lib, the unit of stride parameter is pixel and stride is not equal with width parameter of out buffer in some cases. In order to use latest pxp lib in old version rootfs, PXP_DEVICE_LEGACY macro is used to distinguish pxp drvier version. Because the new pxp driver define a new variable and pxp lib can know this through PXP_DEVICE_LEGACY, and determine if use it. Signed-off-by: Guoniu.Zhou <guoniu.zhou@nxp.com> Reviewed-by...
Guoniu.ZhouGuoniu.Zhou
3928f091b08MLK-16374-2: PxP: add new format support for as and out buffer 1) add PXP_PIX_FMT_BGRA32 format support for AS buffer 2) add PXP_PIX_FMT_BGRA32 format support for OUT buffer Signed-off-by: Guoniu.Zhou <guoniu.zhou@nxp.com> Reviewed-by: Fancy Fang <chen.fang@nxp.com> (cherry picked from commit 4eeefd54cdbb8d1d3ffd64bd444ea7b759101a35)
Guoniu.ZhouGuoniu.Zhou
e2f0c1fa971MLK-16374-1: PxP: add alpha blending back compatible In support of both g2d and pxp lib alpha blending, there must be two alpha blending versions. So there is one rule that user should obey for different usage cases. 1) g2d alpha blending: user should set combine_enable member of struct pxp_proc_data. 2) pxp lib alpha blending: user should set combine_enable member of struct pxp_layer_param if the pxp_layer_param describe overlay buffer parameters. Signed-off-by: Guoniu...
Li JunLi Jun
e4138d07504MLK-16270 ARM64: defconfig: add usb host audio support Build usb host audio as module. Acked-by: Peter Chen <peter.chen@nxp.com> Signed-off-by: Li Jun <jun.li@nxp.com>
Haibo ChenHaibo Chen
2fceea55ae8MLK-16354-2 ARM64: dts: imx8qm: add usdhc support for IOMMU add usdhc1/usdhc2/usdhc3 support for IOMMU Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Haibo ChenHaibo Chen
a753647e601MLK-16354-1 mmc: sdhci: add usdhc support for IOMMU The default max segment size of IOMMU is 64KB, which exceed the ADMA limitation. ADMA only support max to 65535, 64KB - 1Byte. IOMMU will optimize the segments it received, merge the little segment into one big segment. If we use the default IOMMU config, then ADMA will get some segments which it's size is 64KB. Then ADMA error will shows up. Currently, when use standard tuning, driver default disable DMA. But on i.MX usdhc, this is not en...
Shawn LinShawn Lin
be6c03f64b1mmc: block: bypass the queue even if usage is present for hotplug The commit 304419d8a7e9 ("mmc: core: Allocate per-request data using the block layer core") refactored mechanism of queue handling caused mmc_init_request() can be called just after mmc_cleanup_queue() caused null pointer dereference. Another commit bbdc74dc19e0 ("mmc: block: Prevent new req entering queue after its cleanup") tried to fix the problem. However it actually miss one corner case. We could still reproduce the iss...
Grzegorz SlujaGrzegorz Sluja
e96792f73e5mmc: block: Prevent new req entering queue after its cleanup The commit 304419d8a7e9 ("mmc: core: Allocate per-request data using the block layer core"), refactored the mechanism of queue handling, but also made mmc_init_request() to be called after mmc_cleanup_queue(). This triggers a null pointer dereference: [ 683.123791] BUG: unable to handle kernel NULL pointer dereference at (null) [ 683.123801] IP: mmc_init_request+0x2c/0xf0 [mmc_block] ... [ 683.123905] Call Trace: [ 683.123913]...
Anson HuangAnson Huang
19421e27d6dMLK-16372-4 arm64: dts: imx8qm: add cpu-freq cooling map Add i.MX8QM cpu-freq cooling support, when temperature exceeds passive point, cpu-freq will drop to lowest set-point. Both A53 and A72 cluster are supported. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Anson HuangAnson Huang
f984caafcbeMLK-16372-3 arm64: dts: imx8qxp: add cpu-freq cooling map Add i.MX8QXP cpu-freq cooling support, when temperature exceeds passive point, cpu-freq will drop to lowest set-point. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Anson HuangAnson Huang
62e3c9d87e3MLK-16372-2 cpufreq: imx8: add cpu-freq cooling support Register cpu-freq cooling device if device tree supports cooling-cells, different cluster can have its own cooling device settings. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Anson HuangAnson Huang
4a4e69fdf71MLK-16372-1 thermal: imx_sc: add get_trend and set_trip_temp support Add get_trend and set_trip_temp callback to support cpu-freq cooling function. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Bai PingBai Ping
227680cbb0fMLK-16367 driver: clk: imx: enable ddrc apb clock always on i.mx8mq Keep the DDRC APB init on, so we can access the DDRC register. Signed-off-by: Bai Ping <ping.bai@nxp.com>
Shengjiu WangShengjiu Wang
4b554ae7226MLK-16368: irqchip: intmux: fix address definition of register Fix the offset of CHANIPR register address. Document is KL28Z reference manual Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Fancy FangFancy Fang
4f3c9260b35MLK-16370-3 video: fbdev: dcss: align dpr 'pitch' config to 16 bytes for NV12 The Hantro VPU always has a 16 bytes alignment on width. So the pitch configured in DPR should be also aligned to 16 bytes to be compatible with VPU buffer. For now, only NV12 is supported. Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy FangFancy Fang
b796f160afbMLK-16370-2 video: fbdev: dcss: remove YUV422 support in dpr Return error value when meeting 'YUV422' pixel format, since there is no code can handle this format, and this can also avoid some build warning. Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy FangFancy Fang
19b9230c248MLK-16370-1 video: fbdev: dcss: refine 'pitch' config logic for dpr Refine the 'pitch' configuration logic for DPR to make it more reasonable and clear. Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Bai PingBai Ping
064974fa418MLK-16360 ARM64: dts: Update the temp sensor calibration data on i.mx8mq Update the calibration data of the temp sensor range0~3. Signed-off-by: Bai Ping <ping.bai@nxp.com>
Robin GongRobin Gong
649f32a9d8eMLK-16327-2: ARM64: dts: fsl-imx8qm/qxp: correct edma channel name Correct edma channel name to support unique edma channel name in multi edma instances. Signed-off-by: Robin Gong <yibin.gong@nxp.com> Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Robin GongRobin Gong
7dc266ccdfaMLK-16327-1: dma: fsl-edma-v3: make exclusive channel name for all edma channels Since there are multi edmav3 instances on i.mx8, every edma channel name is better unique.But so far, all edma channel name is 'edma-channel(id)- tx',thus some edma channels which share the same channel id but different edma instance will show the same channel name in kernel and this is not friendly to debug in kernel. Now the edma channel name(interrupt-names property) is define in dts as below: "ed...
Haibo ChenHaibo Chen
95a248b2798MLK-16363 mmc: sdhci: add 1ms delay after tuning complete When the last ready-buffer-ready is set, then usdhc execute-tuning bit is clear, this means usdhc finish the tuning process, but at this time, sd/mmc card may still out put the tuning data, can't response to any command. So this patch add 1ms delay when usdhc finish the tuning, make sure sd/mmc card finish sending the tuning data, then sd/mmc can response the following command normally. Signed-off-by: Haibo Chen <haibo.chen@nxp.com> ...
Fancy FangFancy Fang
83cbbb9c32eMLK-16353-6 video: fbdev: dcss: workaround to support non-aligned video playback For the video streams which cannot satified the SCALER alignement requirements for width or height, this is a workaround to drop several vertical lines on the right most side to make these videos can be playback. Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy FangFancy Fang
6f5ad0d61c5MLK-16353-5 Revert "MLK-16255-4 video: fbdev: dcss: add alignment handling for SCALER" Since early patch has added alignment check for SCALER, so there is no need to do alignment calculations in the 'dcss_scaler_config()' for width and height. So revert it. This reverts commit 6f22641b84ac9aaabc2d7f74bf2ee1029c497318.
Fancy FangFancy Fang
b7f1c42a2eaMLK-16353-4 video: fbdev: dcss: add scale ratio check According to the DCSS spec, the maximum scaling down ratio supported by SCALER is 1/7. So add this check when checking fb var info. Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy FangFancy Fang
bbeffb3f70eMLK-16353-3 video: fbdev: dcss: add alignment check in check_var() Add alignment check for SCALER which requires both width and height to be divisable by 4. Put the check in fb_check_var hook. Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy FangFancy Fang
a08c926d44aMLK-16353-2 video: fbdev: dcss: non-fourcc format should not pass var check The non-fourcc pixel format for framebuffer is not supported yet, so the var check cannot pass in this case. Add false return in this case. Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy FangFancy Fang
b1906aaee6aMLK-16353-1 Revert "MLK-16255-6 video: fbdev: dcss: use aligned width to calc pitch for DPR" Previously, the alignment issue was handled by allocating aligned buffer and doing cropping in DCSS. But the VPU IP doesn't support aligned buffer allocation. So revert this patch and later use another workaround in DTRC to handle the alignment issue. This reverts commit e850fdbafe188e6be6d3219d86bb14271c7cd787.
Fugang DuanFugang Duan
29404495efdMLK-15348-02 arm: dts: imx7ulp: add focaltech touch panel ft5246 support Add focaltech new touch panel ft5246 support. Set the ft5426 as default panel for dts. If want to use the old panel, then it needs to boot with imx7ulp-evk-ft5416.dtb file. Signed-off-by: Fugang Duan <fugang.duan@nxp.com> (cherry picked from commit:963fea909ef5e42294cb2e656e5e3870a2171c01)
Fugang DuanFugang Duan
bccf5170c7eMLK-15348-01 input: touch: focaltech: add more property to support multiple panel Add device node more property to support multiple panel. Signed-off-by: Fugang Duan <fugang.duan@nxp.com> (cherry picked from commit: 8e85cfa29fa33b9a6c1335e9f1355290d0f0fab7)
Peter ChenPeter Chen
ab734b3be2dMLK-16221-6 usb: cdns3: gadget: fix non-initialized spinlock warning The below warning is showed if we open lockdep debug, fix it by initializing spinlock before using it. [ 192.159535] INFO: trying to register non-static key. [ 192.164507] the code is fine but needs lockdep annotation. [ 192.169996] turning off the locking correctness validator. [ 192.175485] CPU: 1 PID: 2831 Comm: modprobe Not tainted 4.9.11-03045-g39aab30 #514 [ 192.183054] Hardware name: Freescale i.MX8QXP LPDDR4 A...
Peter ChenPeter Chen
0c71baea1b6MLK-16221-5 usb: cdns3: gadget: fix wMaxPacketSize for ep0 We should set wMaxPacketSize according to connection speed, and add missing ep0 descriptor. Signed-off-by: Peter Chen <peter.chen@nxp.com>
Peter ChenPeter Chen
8535aa4874cMLK-16221-4 usb: cdns3: gadget: disable device mode when the gadget is stopped After USB_CONF.DEVDS is set, the device mode will be disabled, and the host will set the disconnection, this bit is just like DP pullup bit at USB2. And we add disable/enable device mode logic at .pullup function for UDC core. Signed-off-by: Peter Chen <peter.chen@nxp.com>
Peter ChenPeter Chen
eec7e53086fMLK-16221-3 usb: cdns3: gadget: add free memory operation when gadget is stopped When the UDC core calls ->udc_stop, we need to free related non-ep TRB memory. Signed-off-by: Peter Chen <peter.chen@nxp.com>
Peter ChenPeter Chen
5aaf418cfabMLK-16221-2 usb: cdns3: gadget: avoid visiting register when detach When the port does not connect to host, the controller's gadget mode is enabled, so we need to avoid visiting register at this situation. Signed-off-by: Peter Chen <peter.chen@nxp.com>
Peter ChenPeter Chen
b52c38ca1dfMLK-16221-1 usb: cdns3: add module removal support We need to destroy both host and gadget roles when removing module. Signed-off-by: Peter Chen <peter.chen@nxp.com>
Shengjiu WangShengjiu Wang
c27001f47beMLK-16350-6: ASoC: fsl_esai: fix the slow bit clock rate When the mclk is 49M, but hk_rate is 24M, condition for search the corret pm parameter is wrong. which cause the pm=999, then the output bit clock rate is very small. Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Shengjiu WangShengjiu Wang
f018f608f8eMLK-16350-5: ASoC: imx-wm8962: fix clock rate issue The rate returned by clk_get_rate in probe function is not correct, for the power domain in that time may be closed, kernel get 0 rate from scfw, so move the clk_get_rate to hw_params, in that time, the power domain should be enabled Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>